.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify |
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5 | | - * it under the terms of the GNU General Public License version 2 as |
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6 | | - * published by the Free Software Foundation. |
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7 | | - * |
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8 | 4 | */ |
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9 | 5 | #include <linux/mm.h> |
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10 | 6 | #include <linux/delay.h> |
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.. | .. |
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85 | 81 | }; |
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86 | 82 | |
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87 | 83 | static struct clk *clk[clk_max]; |
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88 | | - |
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89 | | -static struct clk ** const uart_clks[] __initconst = { |
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90 | | - &clk[ipg], |
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91 | | - &clk[uart1_gate], |
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92 | | - &clk[uart2_gate], |
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93 | | - &clk[uart3_gate], |
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94 | | - NULL |
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95 | | -}; |
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96 | 84 | |
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97 | 85 | static void __init _mx35_clocks_init(void) |
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98 | 86 | { |
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.. | .. |
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247 | 235 | */ |
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248 | 236 | clk_prepare_enable(clk[scc_gate]); |
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249 | 237 | |
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250 | | - imx_register_uart_clocks(uart_clks); |
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| 238 | + imx_register_uart_clocks(4); |
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251 | 239 | |
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252 | 240 | imx_print_silicon_rev("i.MX35", mx35_revision()); |
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253 | | -} |
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254 | | - |
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255 | | -int __init mx35_clocks_init(void) |
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256 | | -{ |
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257 | | - _mx35_clocks_init(); |
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258 | | - |
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259 | | - clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); |
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260 | | - clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); |
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261 | | - clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1"); |
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262 | | - clk_register_clkdev(clk[cspi1_gate], "per", "imx35-cspi.0"); |
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263 | | - clk_register_clkdev(clk[cspi1_gate], "ipg", "imx35-cspi.0"); |
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264 | | - clk_register_clkdev(clk[cspi2_gate], "per", "imx35-cspi.1"); |
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265 | | - clk_register_clkdev(clk[cspi2_gate], "ipg", "imx35-cspi.1"); |
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266 | | - clk_register_clkdev(clk[epit1_gate], NULL, "imx-epit.0"); |
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267 | | - clk_register_clkdev(clk[epit2_gate], NULL, "imx-epit.1"); |
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268 | | - clk_register_clkdev(clk[esdhc1_gate], "per", "sdhci-esdhc-imx35.0"); |
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269 | | - clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.0"); |
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270 | | - clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.0"); |
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271 | | - clk_register_clkdev(clk[esdhc2_gate], "per", "sdhci-esdhc-imx35.1"); |
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272 | | - clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.1"); |
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273 | | - clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.1"); |
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274 | | - clk_register_clkdev(clk[esdhc3_gate], "per", "sdhci-esdhc-imx35.2"); |
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275 | | - clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.2"); |
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276 | | - clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.2"); |
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277 | | - /* i.mx35 has the i.mx27 type fec */ |
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278 | | - clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); |
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279 | | - clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); |
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280 | | - clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); |
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281 | | - clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); |
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282 | | - clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); |
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283 | | - clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); |
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284 | | - clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); |
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285 | | - clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); |
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286 | | - clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); |
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287 | | - clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); |
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288 | | - clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); |
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289 | | - clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); |
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290 | | - clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); |
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291 | | - /* i.mx35 has the i.mx21 type uart */ |
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292 | | - clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); |
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293 | | - clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); |
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294 | | - clk_register_clkdev(clk[uart2_gate], "per", "imx21-uart.1"); |
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295 | | - clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1"); |
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296 | | - clk_register_clkdev(clk[uart3_gate], "per", "imx21-uart.2"); |
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297 | | - clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2"); |
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298 | | - /* i.mx35 has the i.mx21 type rtc */ |
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299 | | - clk_register_clkdev(clk[ckil], "ref", "imx21-rtc"); |
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300 | | - clk_register_clkdev(clk[rtc_gate], "ipg", "imx21-rtc"); |
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301 | | - clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0"); |
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302 | | - clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0"); |
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303 | | - clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.0"); |
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304 | | - clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.1"); |
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305 | | - clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1"); |
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306 | | - clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.1"); |
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307 | | - clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2"); |
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308 | | - clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2"); |
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309 | | - clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.2"); |
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310 | | - clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27"); |
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311 | | - clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27"); |
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312 | | - clk_register_clkdev(clk[usbotg_gate], "ahb", "imx-udc-mx27"); |
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313 | | - clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); |
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314 | | - clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0"); |
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315 | | - clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); |
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316 | | - clk_register_clkdev(clk[admux_gate], "audmux", NULL); |
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317 | | - |
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318 | | - mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT, GPT_TYPE_IMX31); |
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319 | | - |
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320 | | - return 0; |
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321 | 241 | } |
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322 | 242 | |
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323 | 243 | static void __init mx35_clocks_init_dt(struct device_node *ccm_node) |
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