forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777
kernel/drivers/clk/clk-composite.c
....@@ -1,20 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0
12 /*
23 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
3
- *
4
- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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- * more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program. If not, see <http://www.gnu.org/licenses/>.
154 */
165
17
-#include <linux/clk.h>
186 #include <linux/clk-provider.h>
197 #include <linux/err.h>
208 #include <linux/slab.h>
....@@ -161,31 +149,7 @@
161149 const struct clk_ops *mux_ops = composite->mux_ops;
162150 struct clk_hw *rate_hw = composite->rate_hw;
163151 struct clk_hw *mux_hw = composite->mux_hw;
164
- struct clk_hw *brother_hw = composite->brother_hw;
165152 unsigned long temp_rate;
166
-
167
- if (brother_hw) {
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- struct clk_composite *bcomposite = to_clk_composite(brother_hw);
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- const struct clk_ops *brate_ops = bcomposite->rate_ops;
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- struct clk_hw *brate_hw = bcomposite->rate_hw;
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- struct clk_hw *parent_hw = clk_hw_get_parent(brother_hw);
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- struct clk_hw *new_parent_hw = clk_hw_get_parent(hw);
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-
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- __clk_hw_set_clk(brate_hw, brother_hw);
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-
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- temp_rate = brate_ops->recalc_rate(brate_hw, parent_rate);
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- if (temp_rate > rate)
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- brate_ops->set_rate(brate_hw, rate, parent_rate);
179
- if (clk_hw_is_prepared(brother_hw)) {
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- clk_prepare_enable(new_parent_hw->clk);
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- clk_enable(brother_hw->clk);
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- }
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- clk_hw_reparent(brother_hw, new_parent_hw);
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- if (clk_hw_is_prepared(brother_hw)) {
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- clk_disable(brother_hw->clk);
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- clk_disable_unprepare(parent_hw->clk);
187
- }
188
- }
189153
190154 __clk_hw_set_clk(rate_hw, hw);
191155 __clk_hw_set_clk(mux_hw, hw);
....@@ -235,8 +199,9 @@
235199 gate_ops->disable(gate_hw);
236200 }
237201
238
-struct clk_hw *clk_hw_register_composite(struct device *dev, const char *name,
239
- const char * const *parent_names, int num_parents,
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+static struct clk_hw *__clk_hw_register_composite(struct device *dev,
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+ const char *name, const char * const *parent_names,
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+ const struct clk_parent_data *pdata, int num_parents,
240205 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
241206 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
242207 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
....@@ -253,8 +218,11 @@
253218 return ERR_PTR(-ENOMEM);
254219
255220 init.name = name;
256
- init.flags = flags | CLK_IS_BASIC;
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- init.parent_names = parent_names;
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+ init.flags = flags;
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+ if (parent_names)
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+ init.parent_names = parent_names;
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+ else
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+ init.parent_data = pdata;
258226 init.num_parents = num_parents;
259227 hw = &composite->hw;
260228
....@@ -348,6 +316,35 @@
348316 return hw;
349317 }
350318
319
+struct clk_hw *clk_hw_register_composite(struct device *dev, const char *name,
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+ const char * const *parent_names, int num_parents,
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+ struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
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+ struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
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+ struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
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+ unsigned long flags)
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+{
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+ return __clk_hw_register_composite(dev, name, parent_names, NULL,
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+ num_parents, mux_hw, mux_ops,
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+ rate_hw, rate_ops, gate_hw,
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+ gate_ops, flags);
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+}
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+EXPORT_SYMBOL_GPL(clk_hw_register_composite);
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+
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+struct clk_hw *clk_hw_register_composite_pdata(struct device *dev,
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+ const char *name,
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+ const struct clk_parent_data *parent_data,
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+ int num_parents,
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+ struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
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+ struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
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+ struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
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+ unsigned long flags)
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+{
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+ return __clk_hw_register_composite(dev, name, NULL, parent_data,
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+ num_parents, mux_hw, mux_ops,
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+ rate_hw, rate_ops, gate_hw,
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+ gate_ops, flags);
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+}
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+
351348 struct clk *clk_register_composite(struct device *dev, const char *name,
352349 const char * const *parent_names, int num_parents,
353350 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
....@@ -360,6 +357,25 @@
360357 hw = clk_hw_register_composite(dev, name, parent_names, num_parents,
361358 mux_hw, mux_ops, rate_hw, rate_ops, gate_hw, gate_ops,
362359 flags);
360
+ if (IS_ERR(hw))
361
+ return ERR_CAST(hw);
362
+ return hw->clk;
363
+}
364
+EXPORT_SYMBOL_GPL(clk_register_composite);
365
+
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+struct clk *clk_register_composite_pdata(struct device *dev, const char *name,
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+ const struct clk_parent_data *parent_data,
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+ int num_parents,
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+ struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
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+ struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
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+ struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
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+ unsigned long flags)
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+{
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+ struct clk_hw *hw;
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+
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+ hw = clk_hw_register_composite_pdata(dev, name, parent_data,
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+ num_parents, mux_hw, mux_ops, rate_hw, rate_ops,
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+ gate_hw, gate_ops, flags);
363379 if (IS_ERR(hw))
364380 return ERR_CAST(hw);
365381 return hw->clk;
....@@ -379,3 +395,14 @@
379395 clk_unregister(clk);
380396 kfree(composite);
381397 }
398
+
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+void clk_hw_unregister_composite(struct clk_hw *hw)
400
+{
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+ struct clk_composite *composite;
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+
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+ composite = to_clk_composite(hw);
404
+
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+ clk_hw_unregister(hw);
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+ kfree(composite);
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+}
408
+EXPORT_SYMBOL_GPL(clk_hw_unregister_composite);