change otg to host mode

hc

2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 kernel/arch/x86/include/asm/virtext.h
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@@ -1,3 +1,4 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /* CPU virtualization extensions handling
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  *
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  * This should carry the code for handling CPU virtualization extensions
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@@ -8,9 +9,6 @@
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  * Copyright (C) 2008, Red Hat Inc.
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  *
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  * Contains code from KVM, Copyright (C) 2006 Qumranet, Inc.
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- *
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- * This work is licensed under the terms of the GNU GPL, version 2.  See
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- * the COPYING file in the top-level directory.
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  */
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 #ifndef _ASM_X86_VIRTEX_H
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 #define _ASM_X86_VIRTEX_H
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@@ -32,15 +30,22 @@
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 }
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-/** Disable VMX on the current CPU
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+/**
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+ * cpu_vmxoff() - Disable VMX on the current CPU
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  *
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- * vmxoff causes a undefined-opcode exception if vmxon was not run
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- * on the CPU previously. Only call this function if you know VMX
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- * is enabled.
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+ * Disable VMX and clear CR4.VMXE (even if VMXOFF faults)
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+ *
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+ * Note, VMXOFF causes a #UD if the CPU is !post-VMXON, but it's impossible to
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+ * atomically track post-VMXON state, e.g. this may be called in NMI context.
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+ * Eat all faults as all other faults on VMXOFF faults are mode related, i.e.
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+ * faults are guaranteed to be due to the !post-VMXON check unless the CPU is
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+ * magically in RM, VM86, compat mode, or at CPL>0.
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  */
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 static inline void cpu_vmxoff(void)
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 {
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-	asm volatile (ASM_VMX_VMXOFF : : : "cc");
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+	asm_volatile_goto("1: vmxoff\n\t"
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+			  _ASM_EXTABLE(1b, %l[fault]) :::: fault);
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+fault:
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 	cr4_clear_bits(X86_CR4_VMXE);
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 }
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@@ -83,15 +88,10 @@
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  */
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 static inline int cpu_has_svm(const char **msg)
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 {
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-	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
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+	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
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+	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) {
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 		if (msg)
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-			*msg = "not amd";
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-		return 0;
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-	}
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-
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-	if (boot_cpu_data.extended_cpuid_level < SVM_CPUID_FUNC) {
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-		if (msg)
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-			*msg = "can't execute cpuid_8000000a";
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+			*msg = "not amd or hygon";
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 		return 0;
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 	}
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@@ -114,7 +114,21 @@
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 	wrmsrl(MSR_VM_HSAVE_PA, 0);
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 	rdmsrl(MSR_EFER, efer);
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-	wrmsrl(MSR_EFER, efer & ~EFER_SVME);
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+	if (efer & EFER_SVME) {
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+		/*
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+		 * Force GIF=1 prior to disabling SVM to ensure INIT and NMI
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+		 * aren't blocked, e.g. if a fatal error occurred between CLGI
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+		 * and STGI.  Note, STGI may #UD if SVM is disabled from NMI
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+		 * context between reading EFER and executing STGI.  In that
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+		 * case, GIF must already be set, otherwise the NMI would have
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+		 * been blocked, so just eat the fault.
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+		 */
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+		asm_volatile_goto("1: stgi\n\t"
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+				  _ASM_EXTABLE(1b, %l[fault])
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+				  ::: "memory" : fault);
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+fault:
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+		wrmsrl(MSR_EFER, efer & ~EFER_SVME);
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+	}
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 }
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 /** Makes sure SVM is disabled, if it is supported on the CPU