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hc
2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777 
 kernel/arch/x86/include/asm/text-patching.h
....@@ -18,7 +18,14 @@
1818 #define __parainstructions_end	NULL
1919 #endif
2020 
21
-extern void *text_poke_early(void *addr, const void *opcode, size_t len);
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+/*
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+ * Currently, the max observed size in the kernel code is
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+ * JUMP_LABEL_NOP_SIZE/RELATIVEJUMP_SIZE, which are 5.
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+ * Raise it if needed.
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+ */
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+#define POKE_MAX_OPCODE_SIZE	5
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+
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+extern void text_poke_early(void *addr, const void *opcode, size_t len);
2229 
2330 /*
2431  * Clear and restore the kernel write-protection flag on the local CPU.
....@@ -31,42 +38,133 @@
3138  * no thread can be preempted in the instructions being modified (no iret to an
3239  * invalid instruction possible) or if the instructions are changed from a
3340  * consistent state to another consistent state atomically.
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- * On the local CPU you need to be protected again NMI or MCE handlers seeing an
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- * inconsistent instruction while you patch.
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+ * On the local CPU you need to be protected against NMI or MCE handlers seeing
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+ * an inconsistent instruction while you patch.
3643  */
3744 extern void *text_poke(void *addr, const void *opcode, size_t len);
45
+extern void text_poke_sync(void);
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+extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
3847 extern int poke_int3_handler(struct pt_regs *regs);
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-extern void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler);
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+extern void text_poke_bp(void *addr, const void *opcode, size_t len, const void *emulate);
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+
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+extern void text_poke_queue(void *addr, const void *opcode, size_t len, const void *emulate);
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+extern void text_poke_finish(void);
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+
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+#define INT3_INSN_SIZE		1
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+#define INT3_INSN_OPCODE	0xCC
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+
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+#define RET_INSN_SIZE		1
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+#define RET_INSN_OPCODE		0xC3
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+
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+#define CALL_INSN_SIZE		5
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+#define CALL_INSN_OPCODE	0xE8
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+
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+#define JMP32_INSN_SIZE		5
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+#define JMP32_INSN_OPCODE	0xE9
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+
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+#define JMP8_INSN_SIZE		2
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+#define JMP8_INSN_OPCODE	0xEB
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+
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+#define DISP32_SIZE		4
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+
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+static __always_inline int text_opcode_size(u8 opcode)
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+{
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+	int size = 0;
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+
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+#define __CASE(insn)	\
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+	case insn##_INSN_OPCODE: size = insn##_INSN_SIZE; break
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+
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+	switch(opcode) {
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+	__CASE(INT3);
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+	__CASE(RET);
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+	__CASE(CALL);
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+	__CASE(JMP32);
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+	__CASE(JMP8);
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+	}
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+
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+#undef __CASE
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+
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+	return size;
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+}
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+
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+union text_poke_insn {
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+	u8 text[POKE_MAX_OPCODE_SIZE];
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+	struct {
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+		u8 opcode;
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+		s32 disp;
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+	} __attribute__((packed));
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+};
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+
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+static __always_inline
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+void *text_gen_insn(u8 opcode, const void *addr, const void *dest)
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+{
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+	static union text_poke_insn insn; /* per instance */
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+	int size = text_opcode_size(opcode);
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+
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+	insn.opcode = opcode;
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+
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+	if (size > 1) {
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+		insn.disp = (long)dest - (long)(addr + size);
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+		if (size == 2) {
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+			/*
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+			 * Ensure that for JMP9 the displacement
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+			 * actually fits the signed byte.
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+			 */
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+			BUG_ON((insn.disp >> 31) != (insn.disp >> 7));
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+		}
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+	}
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+
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+	return &insn.text;
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+}
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+
40120 extern int after_bootmem;
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+extern __ro_after_init struct mm_struct *poking_mm;
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+extern __ro_after_init unsigned long poking_addr;
41123 
42124 #ifndef CONFIG_UML_X86
43
-static inline void int3_emulate_jmp(struct pt_regs *regs, unsigned long ip)
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+static __always_inline
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+void int3_emulate_jmp(struct pt_regs *regs, unsigned long ip)
44127 {
45128 	regs->ip = ip;
46129 }
47130 
48
-#define INT3_INSN_SIZE 1
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-#define CALL_INSN_SIZE 5
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-
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-#ifdef CONFIG_X86_64
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-static inline void int3_emulate_push(struct pt_regs *regs, unsigned long val)
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+static __always_inline
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+void int3_emulate_push(struct pt_regs *regs, unsigned long val)
53133 {
54134 	/*
55135 	 * The int3 handler in entry_64.S adds a gap between the
56136 	 * stack where the break point happened, and the saving of
57137 	 * pt_regs. We can extend the original stack because of
58138 	 * this gap. See the idtentry macro's create_gap option.
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+	 *
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+	 * Similarly entry_32.S will have a gap on the stack for (any) hardware
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+	 * exception and pt_regs; see FIXUP_FRAME.
59142 	 */
60143 	regs->sp -= sizeof(unsigned long);
61144 	*(unsigned long *)regs->sp = val;
62145 }
63146 
64
-static inline void int3_emulate_call(struct pt_regs *regs, unsigned long func)
147
+static __always_inline
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+unsigned long int3_emulate_pop(struct pt_regs *regs)
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+{
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+	unsigned long val = *(unsigned long *)regs->sp;
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+	regs->sp += sizeof(unsigned long);
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+	return val;
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+}
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+
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+static __always_inline
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+void int3_emulate_call(struct pt_regs *regs, unsigned long func)
65157 {
66158 	int3_emulate_push(regs, regs->ip - INT3_INSN_SIZE + CALL_INSN_SIZE);
67159 	int3_emulate_jmp(regs, func);
68160 }
69
-#endif /* CONFIG_X86_64 */
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+
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+static __always_inline
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+void int3_emulate_ret(struct pt_regs *regs)
164
+{
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+	unsigned long ip = int3_emulate_pop(regs);
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+	int3_emulate_jmp(regs, ip);
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+}
70168 #endif /* !CONFIG_UML_X86 */
71169 
72170 #endif /* _ASM_X86_TEXT_PATCHING_H */