change otg to host mode

hc

2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 kernel/arch/x86/include/asm/pgtable-3level.h
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@@ -36,39 +36,41 @@
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 #define pmd_read_atomic pmd_read_atomic
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 /*
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- * pte_offset_map_lock on 32bit PAE kernels was reading the pmd_t with
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- * a "*pmdp" dereference done by gcc. Problem is, in certain places
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- * where pte_offset_map_lock is called, concurrent page faults are
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- * allowed, if the mmap_sem is hold for reading. An example is mincore
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+ * pte_offset_map_lock() on 32-bit PAE kernels was reading the pmd_t with
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+ * a "*pmdp" dereference done by GCC. Problem is, in certain places
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+ * where pte_offset_map_lock() is called, concurrent page faults are
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+ * allowed, if the mmap_lock is hold for reading. An example is mincore
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  * vs page faults vs MADV_DONTNEED. On the page fault side
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- * pmd_populate rightfully does a set_64bit, but if we're reading the
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+ * pmd_populate() rightfully does a set_64bit(), but if we're reading the
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  * pmd_t with a "*pmdp" on the mincore side, a SMP race can happen
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- * because gcc will not read the 64bit of the pmd atomically. To fix
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- * this all places running pmd_offset_map_lock() while holding the
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- * mmap_sem in read mode, shall read the pmdp pointer using this
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- * function to know if the pmd is null nor not, and in turn to know if
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- * they can run pmd_offset_map_lock or pmd_trans_huge or other pmd
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+ * because GCC will not read the 64-bit value of the pmd atomically.
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+ *
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+ * To fix this all places running pte_offset_map_lock() while holding the
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+ * mmap_lock in read mode, shall read the pmdp pointer using this
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+ * function to know if the pmd is null or not, and in turn to know if
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+ * they can run pte_offset_map_lock() or pmd_trans_huge() or other pmd
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  * operations.
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  *
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- * Without THP if the mmap_sem is hold for reading, the pmd can only
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- * transition from null to not null while pmd_read_atomic runs. So
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+ * Without THP if the mmap_lock is held for reading, the pmd can only
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+ * transition from null to not null while pmd_read_atomic() runs. So
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  * we can always return atomic pmd values with this function.
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  *
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- * With THP if the mmap_sem is hold for reading, the pmd can become
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+ * With THP if the mmap_lock is held for reading, the pmd can become
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  * trans_huge or none or point to a pte (and in turn become "stable")
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- * at any time under pmd_read_atomic. We could read it really
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- * atomically here with a atomic64_read for the THP enabled case (and
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+ * at any time under pmd_read_atomic(). We could read it truly
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+ * atomically here with an atomic64_read() for the THP enabled case (and
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  * it would be a whole lot simpler), but to avoid using cmpxchg8b we
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  * only return an atomic pmdval if the low part of the pmdval is later
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- * found stable (i.e. pointing to a pte). And we're returning a none
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- * pmdval if the low part of the pmd is none. In some cases the high
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- * and low part of the pmdval returned may not be consistent if THP is
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- * enabled (the low part may point to previously mapped hugepage,
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- * while the high part may point to a more recently mapped hugepage),
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- * but pmd_none_or_trans_huge_or_clear_bad() only needs the low part
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- * of the pmd to be read atomically to decide if the pmd is unstable
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- * or not, with the only exception of when the low part of the pmd is
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- * zero in which case we return a none pmd.
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+ * found to be stable (i.e. pointing to a pte). We are also returning a
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+ * 'none' (zero) pmdval if the low part of the pmd is zero.
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+ *
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+ * In some cases the high and low part of the pmdval returned may not be
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+ * consistent if THP is enabled (the low part may point to previously
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+ * mapped hugepage, while the high part may point to a more recently
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+ * mapped hugepage), but pmd_none_or_trans_huge_or_clear_bad() only
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+ * needs the low part of the pmd to be read atomically to decide if the
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+ * pmd is unstable or not, with the only exception when the low part
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+ * of the pmd is zero, in which case we return a 'none' pmd.
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  */
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 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
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 {
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@@ -284,53 +286,6 @@
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 #define __pte_to_swp_entry(pte)	(__swp_entry(__pteval_swp_type(pte), \
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 					     __pteval_swp_offset(pte)))
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-
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-#define gup_get_pte gup_get_pte
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-/*
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- * WARNING: only to be used in the get_user_pages_fast() implementation.
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- *
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- * With get_user_pages_fast(), we walk down the pagetables without taking
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- * any locks.  For this we would like to load the pointers atomically,
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- * but that is not possible (without expensive cmpxchg8b) on PAE.  What
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- * we do have is the guarantee that a PTE will only either go from not
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- * present to present, or present to not present or both -- it will not
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- * switch to a completely different present page without a TLB flush in
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- * between; something that we are blocking by holding interrupts off.
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- *
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- * Setting ptes from not present to present goes:
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- *
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- *   ptep->pte_high = h;
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- *   smp_wmb();
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- *   ptep->pte_low = l;
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- *
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- * And present to not present goes:
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- *
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- *   ptep->pte_low = 0;
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- *   smp_wmb();
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- *   ptep->pte_high = 0;
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- *
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- * We must ensure here that the load of pte_low sees 'l' iff pte_high
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- * sees 'h'. We load pte_high *after* loading pte_low, which ensures we
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- * don't see an older value of pte_high.  *Then* we recheck pte_low,
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- * which ensures that we haven't picked up a changed pte high. We might
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- * have gotten rubbish values from pte_low and pte_high, but we are
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- * guaranteed that pte_low will not have the present bit set *unless*
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- * it is 'l'. Because get_user_pages_fast() only operates on present ptes
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- * we're safe.
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- */
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-static inline pte_t gup_get_pte(pte_t *ptep)
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-{
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-	pte_t pte;
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-
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-	do {
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-		pte.pte_low = ptep->pte_low;
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-		smp_rmb();
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-		pte.pte_high = ptep->pte_high;
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-		smp_rmb();
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-	} while (unlikely(pte.pte_low != ptep->pte_low));
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-
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-	return pte;
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-}
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 #include <asm/pgtable-invert.h>
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