change otg to host mode

hc

2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 kernel/arch/powerpc/perf/mpc7450-pmu.c
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@@ -1,12 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Performance counter support for MPC7450-family processors.
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  *
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  * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version
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- * 2 of the License, or (at your option) any later version.
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  */
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 #include <linux/string.h>
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 #include <linux/perf_event.h>
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@@ -261,7 +257,7 @@
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  * Compute MMCR0/1/2 values for a set of events.
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  */
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 static int mpc7450_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[],
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-				unsigned long mmcr[],
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+				struct mmcr_regs *mmcr,
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 				struct perf_event *pevents[])
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 {
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 	u8 event_index[N_CLASSES][N_COUNTER];
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@@ -325,9 +321,16 @@
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 		mmcr0 |= MMCR0_PMCnCE;
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 	/* Return MMCRx values */
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-	mmcr[0] = mmcr0;
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-	mmcr[1] = mmcr1;
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-	mmcr[2] = mmcr2;
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+	mmcr->mmcr0 = mmcr0;
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+	mmcr->mmcr1 = mmcr1;
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+	mmcr->mmcr2 = mmcr2;
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+	/*
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+	 * 32-bit doesn't have an MMCRA and uses SPRN_MMCR2 to define
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+	 * SPRN_MMCRA. So assign mmcra of cpu_hw_events with `mmcr2`
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+	 * value to ensure that any write to this SPRN_MMCRA will
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+	 * use mmcr2 value.
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+	 */
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+	mmcr->mmcra = mmcr2;
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 	return 0;
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 }
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@@ -335,12 +338,12 @@
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  * Disable counting by a PMC.
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  * Note that the pmc argument is 0-based here, not 1-based.
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  */
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-static void mpc7450_disable_pmc(unsigned int pmc, unsigned long mmcr[])
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+static void mpc7450_disable_pmc(unsigned int pmc, struct mmcr_regs *mmcr)
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 {
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 	if (pmc <= 1)
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-		mmcr[0] &= ~(pmcsel_mask[pmc] << pmcsel_shift[pmc]);
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+		mmcr->mmcr0 &= ~(pmcsel_mask[pmc] << pmcsel_shift[pmc]);
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 	else
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-		mmcr[1] &= ~(pmcsel_mask[pmc] << pmcsel_shift[pmc]);
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+		mmcr->mmcr1 &= ~(pmcsel_mask[pmc] << pmcsel_shift[pmc]);
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 }
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 static int mpc7450_generic_events[] = {
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@@ -358,7 +361,7 @@
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  * 0 means not supported, -1 means nonsensical, other values
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  * are event codes.
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  */
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-static int mpc7450_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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+static u64 mpc7450_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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 	[C(L1D)] = {		/* 	RESULT_ACCESS	RESULT_MISS */
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 		[C(OP_READ)] = {	0,		0x225	},
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 		[C(OP_WRITE)] = {	0,		0x227	},