.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright 2012 Michael Ellerman, IBM Corporation. |
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3 | 4 | * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation |
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4 | | - * |
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5 | | - * This program is free software; you can redistribute it and/or modify |
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6 | | - * it under the terms of the GNU General Public License, version 2, as |
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7 | | - * published by the Free Software Foundation. |
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8 | 5 | */ |
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9 | 6 | |
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10 | 7 | #include <linux/kernel.h> |
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11 | 8 | #include <linux/kvm_host.h> |
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12 | 9 | #include <linux/err.h> |
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13 | 10 | #include <linux/kernel_stat.h> |
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| 11 | +#include <linux/pgtable.h> |
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14 | 12 | |
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15 | 13 | #include <asm/kvm_book3s.h> |
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16 | 14 | #include <asm/kvm_ppc.h> |
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.. | .. |
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18 | 16 | #include <asm/xics.h> |
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19 | 17 | #include <asm/synch.h> |
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20 | 18 | #include <asm/cputhreads.h> |
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21 | | -#include <asm/pgtable.h> |
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22 | 19 | #include <asm/ppc-opcode.h> |
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23 | 20 | #include <asm/pnv-pci.h> |
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24 | 21 | #include <asm/opal.h> |
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.. | .. |
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136 | 133 | |
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137 | 134 | /* Mark the target VCPU as having an interrupt pending */ |
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138 | 135 | vcpu->stat.queue_intr++; |
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139 | | - set_bit(BOOK3S_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); |
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| 136 | + set_bit(BOOK3S_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); |
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140 | 137 | |
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141 | 138 | /* Kick self ? Just set MER and return */ |
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142 | 139 | if (vcpu == this_vcpu) { |
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143 | 140 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_MER); |
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| 141 | + return; |
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| 142 | + } |
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| 143 | + |
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| 144 | + if (xive_enabled() && kvmhv_on_pseries()) { |
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| 145 | + /* No XICS access or hypercalls available, too hard */ |
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| 146 | + this_icp->rm_action |= XICS_RM_KICK_VCPU; |
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| 147 | + this_icp->rm_kick_target = vcpu; |
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144 | 148 | return; |
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145 | 149 | } |
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146 | 150 | |
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.. | .. |
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170 | 174 | static void icp_rm_clr_vcpu_irq(struct kvm_vcpu *vcpu) |
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171 | 175 | { |
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172 | 176 | /* Note: Only called on self ! */ |
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173 | | - clear_bit(BOOK3S_IRQPRIO_EXTERNAL_LEVEL, |
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174 | | - &vcpu->arch.pending_exceptions); |
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| 177 | + clear_bit(BOOK3S_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); |
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175 | 178 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_MER); |
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176 | 179 | } |
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177 | 180 | |
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.. | .. |
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761 | 764 | return ics_rm_eoi(vcpu, irq); |
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762 | 765 | } |
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763 | 766 | |
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764 | | -unsigned long eoi_rc; |
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| 767 | +static unsigned long eoi_rc; |
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765 | 768 | |
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766 | 769 | static void icp_eoi(struct irq_chip *c, u32 hwirq, __be32 xirr, bool *again) |
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767 | 770 | { |
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768 | 771 | void __iomem *xics_phys; |
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769 | 772 | int64_t rc; |
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| 773 | + |
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| 774 | + if (kvmhv_on_pseries()) { |
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| 775 | + unsigned long retbuf[PLPAR_HCALL_BUFSIZE]; |
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| 776 | + |
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| 777 | + iosync(); |
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| 778 | + plpar_hcall_raw(H_EOI, retbuf, hwirq); |
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| 779 | + return; |
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| 780 | + } |
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770 | 781 | |
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771 | 782 | rc = pnv_opal_pci_msi_eoi(c, hwirq); |
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772 | 783 | |
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.. | .. |
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808 | 819 | raddr = per_cpu_ptr(addr, cpu); |
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809 | 820 | l = (unsigned long)raddr; |
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810 | 821 | |
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811 | | - if (REGION_ID(l) == VMALLOC_REGION_ID) { |
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| 822 | + if (get_region_id(l) == VMALLOC_REGION_ID) { |
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812 | 823 | l = vmalloc_to_phys(raddr); |
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813 | 824 | raddr = (unsigned int *)l; |
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814 | 825 | } |
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