change otg to host mode

hc

2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 kernel/arch/mips/kvm/interrupt.c
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@@ -13,7 +13,7 @@
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 #include <linux/err.h>
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 #include <linux/vmalloc.h>
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 #include <linux/fs.h>
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-#include <linux/bootmem.h>
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+#include <linux/memblock.h>
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 #include <asm/page.h>
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 #include <asm/cacheflush.h>
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@@ -61,27 +61,8 @@
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 	 * the EXC code will be set when we are actually
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 	 * delivering the interrupt:
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 	 */
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-	switch (intr) {
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-	case 2:
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-		kvm_set_c0_guest_cause(vcpu->arch.cop0, (C_IRQ0));
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-		/* Queue up an INT exception for the core */
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-		kvm_mips_queue_irq(vcpu, MIPS_EXC_INT_IO);
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-		break;
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-
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-	case 3:
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-		kvm_set_c0_guest_cause(vcpu->arch.cop0, (C_IRQ1));
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-		kvm_mips_queue_irq(vcpu, MIPS_EXC_INT_IPI_1);
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-		break;
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-
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-	case 4:
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-		kvm_set_c0_guest_cause(vcpu->arch.cop0, (C_IRQ2));
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-		kvm_mips_queue_irq(vcpu, MIPS_EXC_INT_IPI_2);
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-		break;
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-
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-	default:
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-		break;
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-	}
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-
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+	kvm_set_c0_guest_cause(vcpu->arch.cop0, 1 << (intr + 8));
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+	kvm_mips_queue_irq(vcpu, kvm_irq_to_priority(intr));
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 }
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 void kvm_mips_dequeue_io_int_cb(struct kvm_vcpu *vcpu,
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@@ -89,26 +70,8 @@
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 {
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 	int intr = (int)irq->irq;
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-	switch (intr) {
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-	case -2:
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-		kvm_clear_c0_guest_cause(vcpu->arch.cop0, (C_IRQ0));
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-		kvm_mips_dequeue_irq(vcpu, MIPS_EXC_INT_IO);
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-		break;
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-
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-	case -3:
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-		kvm_clear_c0_guest_cause(vcpu->arch.cop0, (C_IRQ1));
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-		kvm_mips_dequeue_irq(vcpu, MIPS_EXC_INT_IPI_1);
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-		break;
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-
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-	case -4:
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-		kvm_clear_c0_guest_cause(vcpu->arch.cop0, (C_IRQ2));
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-		kvm_mips_dequeue_irq(vcpu, MIPS_EXC_INT_IPI_2);
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-		break;
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-
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-	default:
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-		break;
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-	}
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-
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+	kvm_clear_c0_guest_cause(vcpu->arch.cop0, 1 << (-intr + 8));
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+	kvm_mips_dequeue_irq(vcpu, kvm_irq_to_priority(-intr));
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 }
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 /* Deliver the interrupt of the corresponding priority, if possible. */
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@@ -116,50 +79,20 @@
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 			    u32 cause)
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 {
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 	int allowed = 0;
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-	u32 exccode;
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+	u32 exccode, ie;
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 	struct kvm_vcpu_arch *arch = &vcpu->arch;
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 	struct mips_coproc *cop0 = vcpu->arch.cop0;
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-	switch (priority) {
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-	case MIPS_EXC_INT_TIMER:
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-		if ((kvm_read_c0_guest_status(cop0) & ST0_IE)
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-		    && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL)))
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-		    && (kvm_read_c0_guest_status(cop0) & IE_IRQ5)) {
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-			allowed = 1;
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-			exccode = EXCCODE_INT;
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-		}
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-		break;
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+	if (priority == MIPS_EXC_MAX)
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+		return 0;
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-	case MIPS_EXC_INT_IO:
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-		if ((kvm_read_c0_guest_status(cop0) & ST0_IE)
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-		    && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL)))
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-		    && (kvm_read_c0_guest_status(cop0) & IE_IRQ0)) {
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-			allowed = 1;
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-			exccode = EXCCODE_INT;
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-		}
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-		break;
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-
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-	case MIPS_EXC_INT_IPI_1:
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-		if ((kvm_read_c0_guest_status(cop0) & ST0_IE)
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-		    && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL)))
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-		    && (kvm_read_c0_guest_status(cop0) & IE_IRQ1)) {
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-			allowed = 1;
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-			exccode = EXCCODE_INT;
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-		}
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-		break;
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-
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-	case MIPS_EXC_INT_IPI_2:
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-		if ((kvm_read_c0_guest_status(cop0) & ST0_IE)
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-		    && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL)))
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-		    && (kvm_read_c0_guest_status(cop0) & IE_IRQ2)) {
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-			allowed = 1;
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-			exccode = EXCCODE_INT;
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-		}
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-		break;
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-
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-	default:
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-		break;
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+	ie = 1 << (kvm_priority_to_irq[priority] + 8);
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+	if ((kvm_read_c0_guest_status(cop0) & ST0_IE)
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+	    && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL)))
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+	    && (kvm_read_c0_guest_status(cop0) & ie)) {
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+		allowed = 1;
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+		exccode = EXCCODE_INT;
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 	}
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 	/* Are we allowed to deliver the interrupt ??? */