hc
2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777
kernel/arch/arm64/boot/dts/rockchip/rk3528.dtsi
....@@ -452,21 +452,17 @@
452452 compatible = "rockchip,mpp-service";
453453 rockchip,taskqueue-count = <5>;
454454 rockchip,resetgroup-count = <5>;
455
- rockchip,grf = <&grf>;
456
- rockchip,grf-mem-offset = <0x20010>, <0x40034>, <0x40034>,
457
- <0x600e0>, <0x600e0>;
458
- rockchip,grf-mem-on-values = <0x00000021>, <0x0f040000>, <0x0f040000>,
459
- <0xf0040000>, <0xf0040000>;
460
- rockchip,grf-mem-off-values = <0xffff0021>, <0x0f040f04>, <0x0f040f04>,
461
- <0xf004f004>, <0xf004f004>;
462
- rockchip,grf-names = "grf_rkvenc2", "grf_vdpu1", "grf_vdpu2",
463
- "grf_iep2", "grf_vdpp";
464455 status = "disabled";
465456 };
466457
467458 psci {
468459 compatible = "arm,psci-1.0";
469460 method = "smc";
461
+ };
462
+
463
+ rkvtunnel: rkvtunnel {
464
+ compatible = "rockchip,video-tunnel";
465
+ status = "disabled";
470466 };
471467
472468 rockchip_suspend: rockchip-suspend {
....@@ -494,6 +490,12 @@
494490 rockchip,temp-hysteresis = <5000>; /* millicelsius */
495491 rockchip,offline-cpu-temp = <105000>; /* millicelsius */
496492 rockchip,temp-offline-cpus = "2-3";
493
+ };
494
+
495
+ secure_otp: secure-otp {
496
+ compatible = "rockchip,secure-otp";
497
+ rockchip,otp-size = <32>;
498
+ status = "disabled";
497499 };
498500
499501 thermal_zones: thermal-zones {
....@@ -645,12 +647,14 @@
645647 resets = <&cru SRST_ARESETN_USB3OTG>;
646648 reset-names = "usb3-otg";
647649 snps,dis_enblslpm_quirk;
648
- snps,dis-u1u2-quirk;
650
+ snps,dis-u1-entry-quirk;
651
+ snps,dis-u2-entry-quirk;
649652 snps,dis-u2-freeclk-exists-quirk;
650653 snps,dis-del-phy-power-chg-quirk;
651654 snps,dis-tx-ipgap-linecheck-quirk;
652
- snps,xhci-trb-ent-quirk;
653655 snps,dis_rxdet_inp3_quirk;
656
+ snps,parkmode-disable-hs-quirk;
657
+ snps,parkmode-disable-ss-quirk;
654658 quirk-skip-phy-init;
655659 status = "disabled";
656660 };
....@@ -810,7 +814,6 @@
810814 qos_vdpp: qos@ff270480 {
811815 compatible = "syscon";
812816 reg = <0x0 0xff270480 0x0 0x20>;
813
- priority-init = <0x202>;
814817 };
815818
816819 qos_vop: qos@ff270500 {
....@@ -987,7 +990,6 @@
987990 };
988991 pd_vo@RK3528_PD_VO {
989992 reg = <RK3528_PD_VO>;
990
- pm_qos = <&qos_vdpp>;
991993 };
992994 pd_vpu@RK3528_PD_VPU {
993995 reg = <RK3528_PD_VPU>;
....@@ -1195,7 +1197,6 @@
11951197 clock-names = "aclk", "iface", "clk_hevc_cabac";
11961198 #iommu-cells = <0>;
11971199 rockchip,shootdown-entire;
1198
- rockchip,master-handle-irq;
11991200 status = "disabled";
12001201 };
12011202
....@@ -1214,6 +1215,9 @@
12141215 assigned-clock-rates = <300000000>, <300000000>;
12151216 iommus = <&rkvenc_mmu>;
12161217 rockchip,srv = <&mpp_srv>;
1218
+ rockchip,grf = <&grf>;
1219
+ rockchip,grf-mem-offset = <0x20010>;
1220
+ rockchip,grf-mem-values = <0x00000021>, <0xffff0021>;
12171221 rockchip,taskqueue-node = <1>;
12181222 rockchip,resetgroup-node = <1>;
12191223 status = "disabled";
....@@ -1245,6 +1249,9 @@
12451249 reset-names = "shared_video_a", "shared_video_h";
12461250 iommus = <&vdpu_mmu>;
12471251 rockchip,srv = <&mpp_srv>;
1252
+ rockchip,grf = <&grf>;
1253
+ rockchip,grf-mem-offset = <0x40034>;
1254
+ rockchip,grf-mem-values = <0x0f040000>, <0x0f040f04>;
12481255 rockchip,taskqueue-node = <2>;
12491256 rockchip,resetgroup-node = <2>;
12501257 rockchip,disable-auto-freq;
....@@ -1400,7 +1407,6 @@
14001407 clock-names = "aclk", "iface";
14011408 #iommu-cells = <0>;
14021409 rockchip,shootdown-entire;
1403
- rockchip,disable-mmu-reset;
14041410 status = "disabled";
14051411 };
14061412
....@@ -1418,6 +1424,9 @@
14181424 <&cru SRST_RESETN_CORE_VDPP>;
14191425 reset-names = "shared_rst_a", "shared_rst_h", "shared_rst_s";
14201426 rockchip,srv = <&mpp_srv>;
1427
+ rockchip,grf = <&grf>;
1428
+ rockchip,grf-mem-offset = <0x600e0>;
1429
+ rockchip,grf-mem-values = <0xf0040000>, <0xf004f004>;
14211430 rockchip,taskqueue-node = <3>;
14221431 rockchip,resetgroup-node = <3>;
14231432 rockchip,disable-auto-freq;
....@@ -1522,14 +1531,13 @@
15221531 <&cru CLK_SFR_HDMI>,
15231532 <&cru CLK_CEC_HDMI>,
15241533 <&inno_hdmiphy_clk>;
1525
- clock-names = "iahb", "isfr", "cec", "dclk_vop";
1534
+ clock-names = "iahb", "isfr", "cec", "dclk_vp0";
15261535 ddc-i2c-scl-high-time-ns = <9625>;
15271536 ddc-i2c-scl-low-time-ns = <10000>;
15281537 reg-io-width = <4>;
15291538 rockchip,grf = <&grf>;
1530
- pinctrl-names = "default", "idle";
1539
+ pinctrl-names = "default";
15311540 pinctrl-0 = <&hdmi_pins>;
1532
- pinctrl-1 = <&hdmi_pins_idle>;
15331541 phys = <&hdmiphy>;
15341542 phy-names = "hdmi";
15351543 #sound-dai-cells = <0>;
....@@ -1794,6 +1802,7 @@
17941802 pwm0: pwm@ffa90000 {
17951803 compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
17961804 reg = <0x0 0xffa90000 0x0 0x10>;
1805
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
17971806 #pwm-cells = <3>;
17981807 pinctrl-names = "active";
17991808 pinctrl-0 = <&pwm0m0_pins>;
....@@ -1805,6 +1814,7 @@
18051814 pwm1: pwm@ffa90010 {
18061815 compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
18071816 reg = <0x0 0xffa90010 0x0 0x10>;
1817
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
18081818 #pwm-cells = <3>;
18091819 pinctrl-names = "active";
18101820 pinctrl-0 = <&pwm1m0_pins>;
....@@ -1816,6 +1826,7 @@
18161826 pwm2: pwm@ffa90020 {
18171827 compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
18181828 reg = <0x0 0xffa90020 0x0 0x10>;
1829
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
18191830 #pwm-cells = <3>;
18201831 pinctrl-names = "active";
18211832 pinctrl-0 = <&pwm2m0_pins>;
....@@ -1840,6 +1851,7 @@
18401851 pwm4: pwm@ffa98000 {
18411852 compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
18421853 reg = <0x0 0xffa98000 0x0 0x10>;
1854
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
18431855 #pwm-cells = <3>;
18441856 pinctrl-names = "active";
18451857 pinctrl-0 = <&pwm4m0_pins>;
....@@ -1851,6 +1863,7 @@
18511863 pwm5: pwm@ffa98010 {
18521864 compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
18531865 reg = <0x0 0xffa98010 0x0 0x10>;
1866
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
18541867 #pwm-cells = <3>;
18551868 pinctrl-names = "active";
18561869 pinctrl-0 = <&pwm5m0_pins>;
....@@ -1862,6 +1875,7 @@
18621875 pwm6: pwm@ffa98020 {
18631876 compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm";
18641877 reg = <0x0 0xffa98020 0x0 0x10>;
1878
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
18651879 #pwm-cells = <3>;
18661880 pinctrl-names = "active";
18671881 pinctrl-0 = <&pwm6m0_pins>;
....@@ -1896,8 +1910,6 @@
18961910 reg = <0x0 0xffac0000 0x0 0x100>;
18971911 clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>;
18981912 clock-names = "tclk", "pclk";
1899
- resets = <&cru SRST_PRESETN_WDT_NS>;
1900
- reset-names = "reset";
19011913 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
19021914 status = "disabled";
19031915 };
....@@ -1917,6 +1929,8 @@
19171929 rockchip,hw-tshut-temp = <120000>;
19181930 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
19191931 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
1932
+ nvmem-cells = <&cpu_tsadc_trim_l>, <&cpu_tsadc_trim_h>;
1933
+ nvmem-cell-names = "trim_l", "trim_h";
19201934 status = "disabled";
19211935 };
19221936
....@@ -1938,13 +1952,10 @@
19381952 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
19391953 clocks = <&cru MCLK_SAI_I2S3>, <&cru HCLK_SAI_I2S3>;
19401954 clock-names = "mclk", "hclk";
1941
- assigned-clocks = <&cru MCLK_SAI_I2S3>;
1942
- assigned-clock-rates = <6144000>;
19431955 dmas = <&dmac 5>;
19441956 dma-names = "tx";
19451957 resets = <&cru SRST_MRESETN_SAI_I2S3>, <&cru SRST_HRESETN_SAI_I2S3>;
19461958 reset-names = "m", "h";
1947
- rockchip,always-on;
19481959 #sound-dai-cells = <0>;
19491960 status = "disabled";
19501961 };
....@@ -2320,6 +2331,12 @@
23202331 dmc_opp_info: dmc-opp-info@3e {
23212332 reg = <0x3e 0x6>;
23222333 };
2334
+ cpu_tsadc_trim_l: cpu-tsadc-trim-l@44 {
2335
+ reg = <0x44 0x1>;
2336
+ };
2337
+ cpu_tsadc_trim_h: cpu-tsadc-trim-h@45 {
2338
+ reg = <0x45 0x1>;
2339
+ };
23232340 };
23242341
23252342 dmac: dma-controller@ffd60000 {