.. | .. |
---|
452 | 452 | compatible = "rockchip,mpp-service"; |
---|
453 | 453 | rockchip,taskqueue-count = <5>; |
---|
454 | 454 | rockchip,resetgroup-count = <5>; |
---|
455 | | - rockchip,grf = <&grf>; |
---|
456 | | - rockchip,grf-mem-offset = <0x20010>, <0x40034>, <0x40034>, |
---|
457 | | - <0x600e0>, <0x600e0>; |
---|
458 | | - rockchip,grf-mem-on-values = <0x00000021>, <0x0f040000>, <0x0f040000>, |
---|
459 | | - <0xf0040000>, <0xf0040000>; |
---|
460 | | - rockchip,grf-mem-off-values = <0xffff0021>, <0x0f040f04>, <0x0f040f04>, |
---|
461 | | - <0xf004f004>, <0xf004f004>; |
---|
462 | | - rockchip,grf-names = "grf_rkvenc2", "grf_vdpu1", "grf_vdpu2", |
---|
463 | | - "grf_iep2", "grf_vdpp"; |
---|
464 | 455 | status = "disabled"; |
---|
465 | 456 | }; |
---|
466 | 457 | |
---|
467 | 458 | psci { |
---|
468 | 459 | compatible = "arm,psci-1.0"; |
---|
469 | 460 | method = "smc"; |
---|
| 461 | + }; |
---|
| 462 | + |
---|
| 463 | + rkvtunnel: rkvtunnel { |
---|
| 464 | + compatible = "rockchip,video-tunnel"; |
---|
| 465 | + status = "disabled"; |
---|
470 | 466 | }; |
---|
471 | 467 | |
---|
472 | 468 | rockchip_suspend: rockchip-suspend { |
---|
.. | .. |
---|
494 | 490 | rockchip,temp-hysteresis = <5000>; /* millicelsius */ |
---|
495 | 491 | rockchip,offline-cpu-temp = <105000>; /* millicelsius */ |
---|
496 | 492 | rockchip,temp-offline-cpus = "2-3"; |
---|
| 493 | + }; |
---|
| 494 | + |
---|
| 495 | + secure_otp: secure-otp { |
---|
| 496 | + compatible = "rockchip,secure-otp"; |
---|
| 497 | + rockchip,otp-size = <32>; |
---|
| 498 | + status = "disabled"; |
---|
497 | 499 | }; |
---|
498 | 500 | |
---|
499 | 501 | thermal_zones: thermal-zones { |
---|
.. | .. |
---|
645 | 647 | resets = <&cru SRST_ARESETN_USB3OTG>; |
---|
646 | 648 | reset-names = "usb3-otg"; |
---|
647 | 649 | snps,dis_enblslpm_quirk; |
---|
648 | | - snps,dis-u1u2-quirk; |
---|
| 650 | + snps,dis-u1-entry-quirk; |
---|
| 651 | + snps,dis-u2-entry-quirk; |
---|
649 | 652 | snps,dis-u2-freeclk-exists-quirk; |
---|
650 | 653 | snps,dis-del-phy-power-chg-quirk; |
---|
651 | 654 | snps,dis-tx-ipgap-linecheck-quirk; |
---|
652 | | - snps,xhci-trb-ent-quirk; |
---|
653 | 655 | snps,dis_rxdet_inp3_quirk; |
---|
| 656 | + snps,parkmode-disable-hs-quirk; |
---|
| 657 | + snps,parkmode-disable-ss-quirk; |
---|
654 | 658 | quirk-skip-phy-init; |
---|
655 | 659 | status = "disabled"; |
---|
656 | 660 | }; |
---|
.. | .. |
---|
810 | 814 | qos_vdpp: qos@ff270480 { |
---|
811 | 815 | compatible = "syscon"; |
---|
812 | 816 | reg = <0x0 0xff270480 0x0 0x20>; |
---|
813 | | - priority-init = <0x202>; |
---|
814 | 817 | }; |
---|
815 | 818 | |
---|
816 | 819 | qos_vop: qos@ff270500 { |
---|
.. | .. |
---|
987 | 990 | }; |
---|
988 | 991 | pd_vo@RK3528_PD_VO { |
---|
989 | 992 | reg = <RK3528_PD_VO>; |
---|
990 | | - pm_qos = <&qos_vdpp>; |
---|
991 | 993 | }; |
---|
992 | 994 | pd_vpu@RK3528_PD_VPU { |
---|
993 | 995 | reg = <RK3528_PD_VPU>; |
---|
.. | .. |
---|
1195 | 1197 | clock-names = "aclk", "iface", "clk_hevc_cabac"; |
---|
1196 | 1198 | #iommu-cells = <0>; |
---|
1197 | 1199 | rockchip,shootdown-entire; |
---|
1198 | | - rockchip,master-handle-irq; |
---|
1199 | 1200 | status = "disabled"; |
---|
1200 | 1201 | }; |
---|
1201 | 1202 | |
---|
.. | .. |
---|
1214 | 1215 | assigned-clock-rates = <300000000>, <300000000>; |
---|
1215 | 1216 | iommus = <&rkvenc_mmu>; |
---|
1216 | 1217 | rockchip,srv = <&mpp_srv>; |
---|
| 1218 | + rockchip,grf = <&grf>; |
---|
| 1219 | + rockchip,grf-mem-offset = <0x20010>; |
---|
| 1220 | + rockchip,grf-mem-values = <0x00000021>, <0xffff0021>; |
---|
1217 | 1221 | rockchip,taskqueue-node = <1>; |
---|
1218 | 1222 | rockchip,resetgroup-node = <1>; |
---|
1219 | 1223 | status = "disabled"; |
---|
.. | .. |
---|
1245 | 1249 | reset-names = "shared_video_a", "shared_video_h"; |
---|
1246 | 1250 | iommus = <&vdpu_mmu>; |
---|
1247 | 1251 | rockchip,srv = <&mpp_srv>; |
---|
| 1252 | + rockchip,grf = <&grf>; |
---|
| 1253 | + rockchip,grf-mem-offset = <0x40034>; |
---|
| 1254 | + rockchip,grf-mem-values = <0x0f040000>, <0x0f040f04>; |
---|
1248 | 1255 | rockchip,taskqueue-node = <2>; |
---|
1249 | 1256 | rockchip,resetgroup-node = <2>; |
---|
1250 | 1257 | rockchip,disable-auto-freq; |
---|
.. | .. |
---|
1400 | 1407 | clock-names = "aclk", "iface"; |
---|
1401 | 1408 | #iommu-cells = <0>; |
---|
1402 | 1409 | rockchip,shootdown-entire; |
---|
1403 | | - rockchip,disable-mmu-reset; |
---|
1404 | 1410 | status = "disabled"; |
---|
1405 | 1411 | }; |
---|
1406 | 1412 | |
---|
.. | .. |
---|
1418 | 1424 | <&cru SRST_RESETN_CORE_VDPP>; |
---|
1419 | 1425 | reset-names = "shared_rst_a", "shared_rst_h", "shared_rst_s"; |
---|
1420 | 1426 | rockchip,srv = <&mpp_srv>; |
---|
| 1427 | + rockchip,grf = <&grf>; |
---|
| 1428 | + rockchip,grf-mem-offset = <0x600e0>; |
---|
| 1429 | + rockchip,grf-mem-values = <0xf0040000>, <0xf004f004>; |
---|
1421 | 1430 | rockchip,taskqueue-node = <3>; |
---|
1422 | 1431 | rockchip,resetgroup-node = <3>; |
---|
1423 | 1432 | rockchip,disable-auto-freq; |
---|
.. | .. |
---|
1522 | 1531 | <&cru CLK_SFR_HDMI>, |
---|
1523 | 1532 | <&cru CLK_CEC_HDMI>, |
---|
1524 | 1533 | <&inno_hdmiphy_clk>; |
---|
1525 | | - clock-names = "iahb", "isfr", "cec", "dclk_vop"; |
---|
| 1534 | + clock-names = "iahb", "isfr", "cec", "dclk_vp0"; |
---|
1526 | 1535 | ddc-i2c-scl-high-time-ns = <9625>; |
---|
1527 | 1536 | ddc-i2c-scl-low-time-ns = <10000>; |
---|
1528 | 1537 | reg-io-width = <4>; |
---|
1529 | 1538 | rockchip,grf = <&grf>; |
---|
1530 | | - pinctrl-names = "default", "idle"; |
---|
| 1539 | + pinctrl-names = "default"; |
---|
1531 | 1540 | pinctrl-0 = <&hdmi_pins>; |
---|
1532 | | - pinctrl-1 = <&hdmi_pins_idle>; |
---|
1533 | 1541 | phys = <&hdmiphy>; |
---|
1534 | 1542 | phy-names = "hdmi"; |
---|
1535 | 1543 | #sound-dai-cells = <0>; |
---|
.. | .. |
---|
1794 | 1802 | pwm0: pwm@ffa90000 { |
---|
1795 | 1803 | compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; |
---|
1796 | 1804 | reg = <0x0 0xffa90000 0x0 0x10>; |
---|
| 1805 | + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; |
---|
1797 | 1806 | #pwm-cells = <3>; |
---|
1798 | 1807 | pinctrl-names = "active"; |
---|
1799 | 1808 | pinctrl-0 = <&pwm0m0_pins>; |
---|
.. | .. |
---|
1805 | 1814 | pwm1: pwm@ffa90010 { |
---|
1806 | 1815 | compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; |
---|
1807 | 1816 | reg = <0x0 0xffa90010 0x0 0x10>; |
---|
| 1817 | + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; |
---|
1808 | 1818 | #pwm-cells = <3>; |
---|
1809 | 1819 | pinctrl-names = "active"; |
---|
1810 | 1820 | pinctrl-0 = <&pwm1m0_pins>; |
---|
.. | .. |
---|
1816 | 1826 | pwm2: pwm@ffa90020 { |
---|
1817 | 1827 | compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; |
---|
1818 | 1828 | reg = <0x0 0xffa90020 0x0 0x10>; |
---|
| 1829 | + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; |
---|
1819 | 1830 | #pwm-cells = <3>; |
---|
1820 | 1831 | pinctrl-names = "active"; |
---|
1821 | 1832 | pinctrl-0 = <&pwm2m0_pins>; |
---|
.. | .. |
---|
1840 | 1851 | pwm4: pwm@ffa98000 { |
---|
1841 | 1852 | compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; |
---|
1842 | 1853 | reg = <0x0 0xffa98000 0x0 0x10>; |
---|
| 1854 | + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
---|
1843 | 1855 | #pwm-cells = <3>; |
---|
1844 | 1856 | pinctrl-names = "active"; |
---|
1845 | 1857 | pinctrl-0 = <&pwm4m0_pins>; |
---|
.. | .. |
---|
1851 | 1863 | pwm5: pwm@ffa98010 { |
---|
1852 | 1864 | compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; |
---|
1853 | 1865 | reg = <0x0 0xffa98010 0x0 0x10>; |
---|
| 1866 | + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
---|
1854 | 1867 | #pwm-cells = <3>; |
---|
1855 | 1868 | pinctrl-names = "active"; |
---|
1856 | 1869 | pinctrl-0 = <&pwm5m0_pins>; |
---|
.. | .. |
---|
1862 | 1875 | pwm6: pwm@ffa98020 { |
---|
1863 | 1876 | compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; |
---|
1864 | 1877 | reg = <0x0 0xffa98020 0x0 0x10>; |
---|
| 1878 | + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
---|
1865 | 1879 | #pwm-cells = <3>; |
---|
1866 | 1880 | pinctrl-names = "active"; |
---|
1867 | 1881 | pinctrl-0 = <&pwm6m0_pins>; |
---|
.. | .. |
---|
1896 | 1910 | reg = <0x0 0xffac0000 0x0 0x100>; |
---|
1897 | 1911 | clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>; |
---|
1898 | 1912 | clock-names = "tclk", "pclk"; |
---|
1899 | | - resets = <&cru SRST_PRESETN_WDT_NS>; |
---|
1900 | | - reset-names = "reset"; |
---|
1901 | 1913 | interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; |
---|
1902 | 1914 | status = "disabled"; |
---|
1903 | 1915 | }; |
---|
.. | .. |
---|
1917 | 1929 | rockchip,hw-tshut-temp = <120000>; |
---|
1918 | 1930 | rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ |
---|
1919 | 1931 | rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ |
---|
| 1932 | + nvmem-cells = <&cpu_tsadc_trim_l>, <&cpu_tsadc_trim_h>; |
---|
| 1933 | + nvmem-cell-names = "trim_l", "trim_h"; |
---|
1920 | 1934 | status = "disabled"; |
---|
1921 | 1935 | }; |
---|
1922 | 1936 | |
---|
.. | .. |
---|
1938 | 1952 | interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; |
---|
1939 | 1953 | clocks = <&cru MCLK_SAI_I2S3>, <&cru HCLK_SAI_I2S3>; |
---|
1940 | 1954 | clock-names = "mclk", "hclk"; |
---|
1941 | | - assigned-clocks = <&cru MCLK_SAI_I2S3>; |
---|
1942 | | - assigned-clock-rates = <6144000>; |
---|
1943 | 1955 | dmas = <&dmac 5>; |
---|
1944 | 1956 | dma-names = "tx"; |
---|
1945 | 1957 | resets = <&cru SRST_MRESETN_SAI_I2S3>, <&cru SRST_HRESETN_SAI_I2S3>; |
---|
1946 | 1958 | reset-names = "m", "h"; |
---|
1947 | | - rockchip,always-on; |
---|
1948 | 1959 | #sound-dai-cells = <0>; |
---|
1949 | 1960 | status = "disabled"; |
---|
1950 | 1961 | }; |
---|
.. | .. |
---|
2320 | 2331 | dmc_opp_info: dmc-opp-info@3e { |
---|
2321 | 2332 | reg = <0x3e 0x6>; |
---|
2322 | 2333 | }; |
---|
| 2334 | + cpu_tsadc_trim_l: cpu-tsadc-trim-l@44 { |
---|
| 2335 | + reg = <0x44 0x1>; |
---|
| 2336 | + }; |
---|
| 2337 | + cpu_tsadc_trim_h: cpu-tsadc-trim-h@45 { |
---|
| 2338 | + reg = <0x45 0x1>; |
---|
| 2339 | + }; |
---|
2323 | 2340 | }; |
---|
2324 | 2341 | |
---|
2325 | 2342 | dmac: dma-controller@ffd60000 { |
---|