change otg to host mode

hc

2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 kernel/arch/arm64/boot/dts/rockchip/rk1808.dtsi
..
..
@@ -21,7 +21,6 @@
21
21
 	#size-cells = <2>;
22
22
 
23
23
 	aliases {
24
-		ethernet0 = &gmac;
25
24
 		i2c0 = &i2c0;
26
25
 		i2c1 = &i2c1;
27
26
 		i2c2 = &i2c2;
..
..
@@ -241,19 +240,17 @@
241
240
 		};
242
241
 	};
243
242
 
244
-	firmware {
245
-		optee: optee {
246
-			compatible = "linaro,optee-tz";
247
-			method = "smc";
248
-			status = "disabled";
249
-		};
250
-	};
251
-
252
243
 	gmac_clkin: external-gmac-clock {
253
244
 		compatible = "fixed-clock";
254
245
 		clock-frequency = <125000000>;
255
246
 		clock-output-names = "gmac_clkin";
256
247
 		#clock-cells = <0>;
248
+	};
249
+
250
+	mipi_csi2: mipi-csi2 {
251
+		compatible = "rockchip,rk1808-mipi-csi2";
252
+		rockchip,hw = <&mipi_csi2_hw>;
253
+		status = "disabled";
257
254
 	};
258
255
 
259
256
 	psci {
..
..
@@ -381,13 +378,15 @@
381
378
 			phy-names = "usb2-phy", "usb3-phy";
382
379
 			phy_type = "utmi_wide";
383
380
 			snps,dis_enblslpm_quirk;
384
-			snps,dis-u1u2-quirk;
381
+			snps,dis-u1-entry-quirk;
382
+			snps,dis-u2-entry-quirk;
385
383
 			snps,dis-u2-freeclk-exists-quirk;
386
384
 			snps,dis_u2_susphy_quirk;
387
385
 			snps,dis_u3_susphy_quirk;
388
386
 			snps,dis-del-phy-power-chg-quirk;
389
387
 			snps,tx-ipgap-linecheck-dis-quirk;
390
-			snps,xhci-trb-ent-quirk;
388
+			snps,parkmode-disable-hs-quirk;
389
+			snps,parkmode-disable-ss-quirk;
391
390
 			status = "disabled";
392
391
 		};
393
392
 	};
..
..
@@ -808,6 +807,7 @@
808
807
 	pwm0: pwm@ff3d0000 {
809
808
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
810
809
 		reg = <0x0 0xff3d0000 0x0 0x10>;
810
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
811
811
 		#pwm-cells = <3>;
812
812
 		pinctrl-names = "active";
813
813
 		pinctrl-0 = <&pwm0_pin>;
..
..
@@ -819,6 +819,7 @@
819
819
 	pwm1: pwm@ff3d0010 {
820
820
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
821
821
 		reg = <0x0 0xff3d0010 0x0 0x10>;
822
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
822
823
 		#pwm-cells = <3>;
823
824
 		pinctrl-names = "active";
824
825
 		pinctrl-0 = <&pwm1_pin>;
..
..
@@ -830,6 +831,7 @@
830
831
 	pwm2: pwm@ff3d0020 {
831
832
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
832
833
 		reg = <0x0 0xff3d0020 0x0 0x10>;
834
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
833
835
 		#pwm-cells = <3>;
834
836
 		pinctrl-names = "active";
835
837
 		pinctrl-0 = <&pwm2_pin>;
..
..
@@ -841,6 +843,8 @@
841
843
 	pwm3: pwm@ff3d0030 {
842
844
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
843
845
 		reg = <0x0 0xff3d0030 0x0 0x10>;
846
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
847
+			     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
844
848
 		#pwm-cells = <3>;
845
849
 		pinctrl-names = "active";
846
850
 		pinctrl-0 = <&pwm3_pin>;
..
..
@@ -852,6 +856,7 @@
852
856
 	pwm4: pwm@ff3d8000 {
853
857
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
854
858
 		reg = <0x0 0xff3d8000 0x0 0x10>;
859
+		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
855
860
 		#pwm-cells = <3>;
856
861
 		pinctrl-names = "active";
857
862
 		pinctrl-0 = <&pwm4_pin>;
..
..
@@ -863,6 +868,7 @@
863
868
 	pwm5: pwm@ff3d8010 {
864
869
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
865
870
 		reg = <0x0 0xff3d8010 0x0 0x10>;
871
+		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
866
872
 		#pwm-cells = <3>;
867
873
 		pinctrl-names = "active";
868
874
 		pinctrl-0 = <&pwm5_pin>;
..
..
@@ -874,6 +880,7 @@
874
880
 	pwm6: pwm@ff3d8020 {
875
881
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
876
882
 		reg = <0x0 0xff3d8020 0x0 0x10>;
883
+		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
877
884
 		#pwm-cells = <3>;
878
885
 		pinctrl-names = "active";
879
886
 		pinctrl-0 = <&pwm6_pin>;
..
..
@@ -885,6 +892,8 @@
885
892
 	pwm7: pwm@ff3d8030 {
886
893
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
887
894
 		reg = <0x0 0xff3d8030 0x0 0x10>;
895
+		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
896
+			     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
888
897
 		#pwm-cells = <3>;
889
898
 		pinctrl-names = "active";
890
899
 		pinctrl-0 = <&pwm7_pin>;
..
..
@@ -1213,6 +1222,7 @@
1213
1222
 	pwm8: pwm@ff5d0000 {
1214
1223
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
1215
1224
 		reg = <0x0 0xff5d0000 0x0 0x10>;
1225
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
1216
1226
 		#pwm-cells = <3>;
1217
1227
 		pinctrl-names = "active";
1218
1228
 		pinctrl-0 = <&pwm8_pin>;
..
..
@@ -1224,6 +1234,7 @@
1224
1234
 	pwm9: pwm@fff5d0010 {
1225
1235
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
1226
1236
 		reg = <0x0 0xff5d0010 0x0 0x10>;
1237
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
1227
1238
 		#pwm-cells = <3>;
1228
1239
 		pinctrl-names = "active";
1229
1240
 		pinctrl-0 = <&pwm9_pin>;
..
..
@@ -1235,6 +1246,7 @@
1235
1246
 	pwm10: pwm@ff5d0020 {
1236
1247
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
1237
1248
 		reg = <0x0 0xff5d0020 0x0 0x10>;
1249
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
1238
1250
 		#pwm-cells = <3>;
1239
1251
 		pinctrl-names = "active";
1240
1252
 		pinctrl-0 = <&pwm10_pin>;
..
..
@@ -1246,6 +1258,8 @@
1246
1258
 	pwm11: pwm@ff5d0030 {
1247
1259
 		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
1248
1260
 		reg = <0x0 0xff5d0030 0x0 0x10>;
1261
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
1262
+			     <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
1249
1263
 		#pwm-cells = <3>;
1250
1264
 		pinctrl-names = "active";
1251
1265
 		pinctrl-0 = <&pwm11_pin>;
..
..
@@ -1335,7 +1349,7 @@
1335
1349
 	};
1336
1350
 
1337
1351
 	pdm: pdm@ff800000 {
1338
-		compatible = "rockchip,rk1808-pdm";
1352
+		compatible = "rockchip,rk1808-pdm", "rockchip,pdm";
1339
1353
 		reg = <0x0 0xff800000 0x0 0x1000>;
1340
1354
 		clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
1341
1355
 		clock-names = "pdm_clk", "pdm_hclk";
..
..
@@ -1533,8 +1547,8 @@
1533
1547
 		status = "disabled";
1534
1548
 	};
1535
1549
 
1536
-	mipi_csi2: mipi-csi2@ffb10000 {
1537
-		compatible = "rockchip,rk1808-mipi-csi2";
1550
+	mipi_csi2_hw: mipi-csi2-hw@ffb10000 {
1551
+		compatible = "rockchip,rk1808-mipi-csi2-hw";
1538
1552
 		reg = <0x0 0xffb10000 0x0 0x100>;
1539
1553
 		reg-names = "csihost_regs";
1540
1554
 		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -1701,7 +1715,7 @@
1701
1715
 		reg = <0x0 0xffc60000 0x0 0x4000>;
1702
1716
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
1703
1717
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
1704
-		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
1718
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
1705
1719
 		max-frequency = <150000000>;
1706
1720
 		fifo-depth = <0x100>;
1707
1721
 		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -1798,7 +1812,7 @@
1798
1812
 		reg = <0x0 0xffcf0000 0x0 0x4000>;
1799
1813
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
1800
1814
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
1801
-		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
1815
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
1802
1816
 		max-frequency = <150000000>;
1803
1817
 		fifo-depth = <0x100>;
1804
1818
 		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -1812,7 +1826,7 @@
1812
1826
 		reg = <0x0 0xffd00000 0x0 0x4000>;
1813
1827
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
1814
1828
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
1815
-		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
1829
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
1816
1830
 		max-frequency = <150000000>;
1817
1831
 		fifo-depth = <0x100>;
1818
1832
 		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -2254,15 +2268,15 @@
2254
2268
 		i2s1 {
2255
2269
 			i2s1_2ch_lrck: i2s1-2ch-lrck {
2256
2270
 				rockchip,pins =
2257
-					<3 RK_PA0 1 &pcfg_pull_none_2ma>;
2271
+					<3 RK_PA0 1 &pcfg_pull_none_2ma_smt>;
2258
2272
 			};
2259
2273
 			i2s1_2ch_sclk: i2s1-2ch-sclk {
2260
2274
 				rockchip,pins =
2261
-					<3 RK_PA1 1 &pcfg_pull_none_2ma>;
2275
+					<3 RK_PA1 1 &pcfg_pull_none_2ma_smt>;
2262
2276
 			};
2263
2277
 			i2s1_2ch_mclk: i2s1-2ch-mclk {
2264
2278
 				rockchip,pins =
2265
-					<3 RK_PA2 1 &pcfg_pull_none_2ma>;
2279
+					<3 RK_PA2 1 &pcfg_pull_none_2ma_smt>;
2266
2280
 			};
2267
2281
 			i2s1_2ch_sdo: i2s1-2ch-sdo {
2268
2282
 				rockchip,pins =
..
..
@@ -2289,11 +2303,11 @@
2289
2303
 			};
2290
2304
 			i2s0_8ch_sclkrx: i2s0-8ch-sclkrx {
2291
2305
 				rockchip,pins =
2292
-					<3 RK_PB0 1 &pcfg_pull_none_2ma>;
2306
+					<3 RK_PB0 1 &pcfg_pull_none_2ma_smt>;
2293
2307
 			};
2294
2308
 			i2s0_8ch_lrckrx: i2s0-8ch-lrckrx {
2295
2309
 				rockchip,pins =
2296
-					<3 RK_PB1 1 &pcfg_pull_none_2ma>;
2310
+					<3 RK_PB1 1 &pcfg_pull_none_2ma_smt>;
2297
2311
 			};
2298
2312
 			i2s0_8ch_sdo3: i2s0-8ch-sdo3 {
2299
2313
 				rockchip,pins =
..
..
@@ -2309,15 +2323,15 @@
2309
2323
 			};
2310
2324
 			i2s0_8ch_mclk: i2s0-8ch-mclk {
2311
2325
 				rockchip,pins =
2312
-					<3 RK_PB5 1 &pcfg_pull_none_2ma>;
2326
+					<3 RK_PB5 1 &pcfg_pull_none_2ma_smt>;
2313
2327
 			};
2314
2328
 			i2s0_8ch_lrcktx: i2s0-8ch-lrcktx {
2315
2329
 				rockchip,pins =
2316
-					<3 RK_PB6 1 &pcfg_pull_none_2ma>;
2330
+					<3 RK_PB6 1 &pcfg_pull_none_2ma_smt>;
2317
2331
 			};
2318
2332
 			i2s0_8ch_sclktx: i2s0-8ch-sclktx {
2319
2333
 				rockchip,pins =
2320
-					<3 RK_PB7 1 &pcfg_pull_none_2ma>;
2334
+					<3 RK_PB7 1 &pcfg_pull_none_2ma_smt>;
2321
2335
 			};
2322
2336
 			i2s0_8ch_sdo0: i2s0-8ch-sdo0 {
2323
2337
 				rockchip,pins =