.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2015, Applied Micro Circuits Corporation |
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5 | | - * |
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6 | | - * This program is free software; you can redistribute it and/or |
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7 | | - * modify it under the terms of the GNU General Public License as |
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8 | | - * published by the Free Software Foundation; either version 2 of |
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9 | | - * the License, or (at your option) any later version. |
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10 | 6 | */ |
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11 | 7 | |
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12 | 8 | / { |
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.. | .. |
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21 | 17 | |
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22 | 18 | cpu@0 { |
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23 | 19 | device_type = "cpu"; |
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24 | | - compatible = "apm,strega", "arm,armv8"; |
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| 20 | + compatible = "apm,strega"; |
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25 | 21 | reg = <0x0 0x000>; |
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26 | 22 | enable-method = "spin-table"; |
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27 | 23 | cpu-release-addr = <0x1 0x0000fff8>; |
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.. | .. |
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31 | 27 | }; |
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32 | 28 | cpu@1 { |
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33 | 29 | device_type = "cpu"; |
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34 | | - compatible = "apm,strega", "arm,armv8"; |
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| 30 | + compatible = "apm,strega"; |
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35 | 31 | reg = <0x0 0x001>; |
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36 | 32 | enable-method = "spin-table"; |
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37 | 33 | cpu-release-addr = <0x1 0x0000fff8>; |
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.. | .. |
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41 | 37 | }; |
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42 | 38 | cpu@100 { |
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43 | 39 | device_type = "cpu"; |
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44 | | - compatible = "apm,strega", "arm,armv8"; |
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| 40 | + compatible = "apm,strega"; |
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45 | 41 | reg = <0x0 0x100>; |
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46 | 42 | enable-method = "spin-table"; |
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47 | 43 | cpu-release-addr = <0x1 0x0000fff8>; |
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.. | .. |
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51 | 47 | }; |
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52 | 48 | cpu@101 { |
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53 | 49 | device_type = "cpu"; |
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54 | | - compatible = "apm,strega", "arm,armv8"; |
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| 50 | + compatible = "apm,strega"; |
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55 | 51 | reg = <0x0 0x101>; |
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56 | 52 | enable-method = "spin-table"; |
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57 | 53 | cpu-release-addr = <0x1 0x0000fff8>; |
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.. | .. |
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61 | 57 | }; |
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62 | 58 | cpu@200 { |
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63 | 59 | device_type = "cpu"; |
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64 | | - compatible = "apm,strega", "arm,armv8"; |
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| 60 | + compatible = "apm,strega"; |
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65 | 61 | reg = <0x0 0x200>; |
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66 | 62 | enable-method = "spin-table"; |
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67 | 63 | cpu-release-addr = <0x1 0x0000fff8>; |
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.. | .. |
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71 | 67 | }; |
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72 | 68 | cpu@201 { |
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73 | 69 | device_type = "cpu"; |
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74 | | - compatible = "apm,strega", "arm,armv8"; |
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| 70 | + compatible = "apm,strega"; |
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75 | 71 | reg = <0x0 0x201>; |
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76 | 72 | enable-method = "spin-table"; |
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77 | 73 | cpu-release-addr = <0x1 0x0000fff8>; |
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.. | .. |
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81 | 77 | }; |
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82 | 78 | cpu@300 { |
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83 | 79 | device_type = "cpu"; |
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84 | | - compatible = "apm,strega", "arm,armv8"; |
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| 80 | + compatible = "apm,strega"; |
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85 | 81 | reg = <0x0 0x300>; |
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86 | 82 | enable-method = "spin-table"; |
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87 | 83 | cpu-release-addr = <0x1 0x0000fff8>; |
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.. | .. |
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91 | 87 | }; |
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92 | 88 | cpu@301 { |
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93 | 89 | device_type = "cpu"; |
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94 | | - compatible = "apm,strega", "arm,armv8"; |
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| 90 | + compatible = "apm,strega"; |
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95 | 91 | reg = <0x0 0x301>; |
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96 | 92 | enable-method = "spin-table"; |
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97 | 93 | cpu-release-addr = <0x1 0x0000fff8>; |
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.. | .. |
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713 | 709 | dwgpio: gpio@1c024000 { |
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714 | 710 | compatible = "snps,dw-apb-gpio"; |
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715 | 711 | reg = <0x0 0x1c024000 0x0 0x1000>; |
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716 | | - reg-io-width = <4>; |
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717 | 712 | #address-cells = <1>; |
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718 | 713 | #size-cells = <0>; |
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719 | 714 | |
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720 | 715 | porta: gpio-controller@0 { |
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721 | 716 | compatible = "snps,dw-apb-gpio-port"; |
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722 | 717 | gpio-controller; |
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| 718 | + #gpio-cells = <2>; |
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723 | 719 | snps,nr-gpios = <32>; |
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724 | 720 | reg = <0>; |
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725 | 721 | }; |
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