.. | .. |
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103 | 103 | int count = MAX_PLL_LOCK_20MS_WAITS; |
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104 | 104 | |
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105 | 105 | do { |
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106 | | - ret = snd_soc_component_read32(component, R_PLLCTL0); |
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| 106 | + ret = snd_soc_component_read(component, R_PLLCTL0); |
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107 | 107 | if (ret < 0) { |
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108 | 108 | dev_err(component->dev, |
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109 | 109 | "Failed to read PLL lock status (%d)\n", ret); |
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.. | .. |
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148 | 148 | for (cnt = 0; cnt < coeff_cnt; cnt++, addr++) { |
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149 | 149 | |
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150 | 150 | for (trys = 0; trys < DACCRSTAT_MAX_TRYS; trys++) { |
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151 | | - ret = snd_soc_component_read32(component, R_DACCRSTAT); |
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| 151 | + ret = snd_soc_component_read(component, R_DACCRSTAT); |
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152 | 152 | if (ret < 0) { |
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153 | 153 | dev_err(component->dev, |
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154 | 154 | "Failed to read stat (%d)\n", ret); |
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.. | .. |
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389 | 389 | |
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390 | 390 | mutex_lock(&tscs42xx->coeff_ram_lock); |
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391 | 391 | |
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392 | | - if (tscs42xx->coeff_ram_synced == false) { |
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| 392 | + if (!tscs42xx->coeff_ram_synced) { |
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393 | 393 | ret = write_coeff_ram(component, tscs42xx->coeff_ram, 0x00, |
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394 | 394 | COEFF_RAM_COEFF_COUNT); |
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395 | 395 | if (ret < 0) |
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