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288 | 288 | #define ACDCDIG_I2S_RXCR1_RCSR_2CH (0x0 << 6) |
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289 | 289 | /* I2S_CKR0 */ |
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290 | 290 | #define ACDCDIG_I2S_CKR0_TSD_MASK GENMASK(1, 0) |
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291 | | -#define ACDCDIG_I2S_CKR0_TSD(x) ((x) << 0) |
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| 291 | +#define ACDCDIG_I2S_CKR0_TSD_64 (0 << 0) |
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| 292 | +#define ACDCDIG_I2S_CKR0_TSD_128 (1 << 0) |
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| 293 | +#define ACDCDIG_I2S_CKR0_TSD_256 (2 << 0) |
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292 | 294 | #define ACDCDIG_I2S_CKR0_RSD_MASK GENMASK(3, 2) |
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293 | | -#define ACDCDIG_I2S_CKR0_RSD(x) ((x) << 2) |
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| 295 | +#define ACDCDIG_I2S_CKR0_RSD_64 (0 << 2) |
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| 296 | +#define ACDCDIG_I2S_CKR0_RSD_128 (1 << 2) |
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| 297 | +#define ACDCDIG_I2S_CKR0_RSD_256 (2 << 2) |
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| 298 | + |
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294 | 299 | /* I2S_CKR1 */ |
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295 | 300 | #define ACDCDIG_I2S_CKR1_TLP_MASK BIT(0) |
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296 | 301 | #define ACDCDIG_I2S_CKR1_TLP_INVERTED BIT(0) |
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