forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d 
 kernel/include/soc/rockchip/rockchip_opp_select.h
....@@ -6,11 +6,87 @@
66 #ifndef __SOC_ROCKCHIP_OPP_SELECT_H
77 #define __SOC_ROCKCHIP_OPP_SELECT_H
88 
9
+#define VOLT_RM_TABLE_END	~1
10
+
11
+/*
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+ * [0]:      set intermediate rate
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+ *           [1]: scaling up rate or scaling down rate
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+ * [1]:      add length for pvtpll
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+ *           [2:5]: length
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+ * [2]:      use low length for pvtpll
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+ * [3:5]:    reserved
18
+ */
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+#define OPP_RATE_MASK		0x3f
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+
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+/* Set intermediate rate */
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+#define OPP_INTERMEDIATE_RATE	BIT(0)
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+#define OPP_SCALING_UP_RATE	BIT(1)
24
+#define OPP_SCALING_UP_INTER	(OPP_INTERMEDIATE_RATE | OPP_SCALING_UP_RATE)
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+#define OPP_SCALING_DOWN_INTER	OPP_INTERMEDIATE_RATE
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+
27
+/* Add length for pvtpll */
28
+#define OPP_ADD_LENGTH		BIT(1)
29
+#define OPP_LENGTH_MASK		0xf
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+#define OPP_LENGTH_SHIFT	2
31
+
32
+/* Use low length for pvtpll */
33
+#define OPP_LENGTH_LOW		BIT(2)
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+
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+struct rockchip_opp_info;
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+
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+struct volt_rm_table {
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+	int volt;
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+	int rm;
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+};
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+
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+struct rockchip_opp_data {
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+	int (*get_soc_info)(struct device *dev, struct device_node *np,
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+			    int *bin, int *process);
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+	int (*set_soc_info)(struct device *dev, struct device_node *np,
46
+			    int bin, int process, int volt_sel);
47
+	int (*set_read_margin)(struct device *dev,
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+			       struct rockchip_opp_info *opp_info,
49
+			       u32 rm);
50
+};
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+
52
+struct pvtpll_opp_table {
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+	unsigned long rate;
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+	unsigned long u_volt;
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+	unsigned long u_volt_min;
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+	unsigned long u_volt_max;
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+	unsigned long u_volt_mem;
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+	unsigned long u_volt_mem_min;
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+	unsigned long u_volt_mem_max;
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+};
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+
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+struct rockchip_opp_info {
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+	struct device *dev;
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+	struct pvtpll_opp_table *opp_table;
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+	const struct rockchip_opp_data *data;
66
+	struct volt_rm_table *volt_rm_tbl;
67
+	struct regmap *grf;
68
+	struct regmap *dsu_grf;
69
+	struct clk_bulk_data *clks;
70
+	struct clk *scmi_clk;
71
+	/* The threshold frequency for set intermediate rate */
72
+	unsigned long intermediate_threshold_freq;
73
+	unsigned int pvtpll_avg_offset;
74
+	unsigned int pvtpll_min_rate;
75
+	unsigned int pvtpll_volt_step;
76
+	int num_clks;
77
+	/* The read margin for low voltage */
78
+	u32 low_rm;
79
+	u32 current_rm;
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+	u32 target_rm;
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+};
82
+
983 #if IS_ENABLED(CONFIG_ROCKCHIP_OPP)
1084 int rockchip_of_get_leakage(struct device *dev, char *lkg_name, int *leakage);
1185 void rockchip_of_get_lkg_sel(struct device *dev, struct device_node *np,
1286 			     char *lkg_name, int process,
1387 			     int *volt_sel, int *scale_sel);
88
+void rockchip_pvtpll_calibrate_opp(struct rockchip_opp_info *info);
89
+void rockchip_pvtpll_add_length(struct rockchip_opp_info *info);
1490 void rockchip_of_get_pvtm_sel(struct device *dev, struct device_node *np,
1591 			      char *reg_name, int process,
1692 			      int *volt_sel, int *scale_sel);
....@@ -22,29 +98,52 @@
2298 				u8 *val);
2399 int rockchip_nvmem_cell_read_u16(struct device_node *np, const char *cell_id,
24100 				 u16 *val);
25
-void rockchip_get_soc_info(struct device *dev,
26
-			   const struct of_device_id *matches,
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-			   int *bin, int *process);
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+int rockchip_get_volt_rm_table(struct device *dev, struct device_node *np,
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+			       char *porp_name, struct volt_rm_table **table);
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+void rockchip_get_opp_data(const struct of_device_id *matches,
104
+			   struct rockchip_opp_info *info);
28105 void rockchip_get_scale_volt_sel(struct device *dev, char *lkg_name,
29106 				 char *reg_name, int bin, int process,
30107 				 int *scale, int *volt_sel);
31108 struct opp_table *rockchip_set_opp_prop_name(struct device *dev, int process,
32109 					     int volt_sel);
33110 int rockchip_adjust_power_scale(struct device *dev, int scale);
111
+int rockchip_get_read_margin(struct device *dev,
112
+			     struct rockchip_opp_info *opp_info,
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+			     unsigned long volt, u32 *target_rm);
114
+int rockchip_set_read_margin(struct device *dev,
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+			     struct rockchip_opp_info *opp_info, u32 rm,
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+			     bool is_set_rm);
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+int rockchip_init_read_margin(struct device *dev,
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+			      struct rockchip_opp_info *opp_info,
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+			      char *reg_name);
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+int rockchip_set_intermediate_rate(struct device *dev,
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+				   struct rockchip_opp_info *opp_info,
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+				   struct clk *clk, unsigned long old_freq,
123
+				   unsigned long new_freq, bool is_scaling_up,
124
+				   bool is_set_clk);
34125 int rockchip_init_opp_table(struct device *dev,
35
-			    const struct of_device_id *matches,
126
+			    struct rockchip_opp_info *info,
36127 			    char *lkg_name, char *reg_name);
37128 #else
38129 static inline int rockchip_of_get_leakage(struct device *dev, char *lkg_name,
39130 					  int *leakage)
40131 {
41
-	return -ENOTSUPP;
132
+	return -EOPNOTSUPP;
42133 }
43134 
44135 static inline void rockchip_of_get_lkg_sel(struct device *dev,
45136 					   struct device_node *np,
46137 					   char *lkg_name, int process,
47138 					   int *volt_sel, int *scale_sel)
139
+{
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+}
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+
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+static inline void rockchip_pvtpll_calibrate_opp(struct rockchip_opp_info *info)
143
+{
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+}
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+
146
+static inline void rockchip_pvtpll_add_length(struct rockchip_opp_info *info)
48147 {
49148 }
50149 
....@@ -79,9 +178,17 @@
79178 	return -EOPNOTSUPP;
80179 }
81180 
82
-static inline void rockchip_get_soc_info(struct device *dev,
83
-					 const struct of_device_id *matches,
84
-					 int *bin, int *process)
181
+static inline int rockchip_get_volt_rm_table(struct device *dev,
182
+					     struct device_node *np,
183
+					     char *porp_name,
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+					     struct volt_rm_table **table)
185
+{
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+	return -EOPNOTSUPP;
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+
188
+}
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+
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+static inline void rockchip_get_opp_data(const struct of_device_id *matches,
191
+					 struct rockchip_opp_info *info)
85192 {
86193 }
87194 
....@@ -96,19 +203,49 @@
96203 							   int process,
97204 							   int volt_sel)
98205 {
99
-	return ERR_PTR(-ENOTSUPP);
206
+	return ERR_PTR(-EOPNOTSUPP);
100207 }
101208 
102209 static inline int rockchip_adjust_power_scale(struct device *dev, int scale)
103210 {
104
-	return -ENOTSUPP;
211
+	return -EOPNOTSUPP;
212
+}
213
+
214
+static inline int rockchip_get_read_margin(struct device *dev,
215
+					   struct rockchip_opp_info *opp_info,
216
+					   unsigned long volt, u32 *target_rm)
217
+{
218
+	return -EOPNOTSUPP;
219
+}
220
+static inline int rockchip_set_read_margin(struct device *dev,
221
+					   struct rockchip_opp_info *opp_info,
222
+					   u32 rm, bool is_set_rm)
223
+{
224
+	return -EOPNOTSUPP;
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+}
226
+
227
+static inline int rockchip_init_read_margin(struct device *dev,
228
+					    struct rockchip_opp_info *opp_info,
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+					    char *reg_name)
230
+{
231
+	return -EOPNOTSUPP;
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+}
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+
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+static inline int
235
+rockchip_set_intermediate_rate(struct device *dev,
236
+			       struct rockchip_opp_info *opp_info,
237
+			       struct clk *clk, unsigned long old_freq,
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+			       unsigned long new_freq, bool is_scaling_up,
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+			       bool is_set_clk)
240
+{
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+	return -EOPNOTSUPP;
105242 }
106243 
107244 static inline int rockchip_init_opp_table(struct device *dev,
108
-					  const struct of_device_id *matches,
245
+					  struct rockchip_opp_info *info,
109246 					  char *lkg_name, char *reg_name)
110247 {
111
-	return -ENOTSUPP;
248
+	return -EOPNOTSUPP;
112249 }
113250 
114251 #endif /* CONFIG_ROCKCHIP_OPP */