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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d

 kernel/include/linux/soundwire/sdw_intel.h
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@@ -1,38 +1,190 @@
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-// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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-// Copyright(c) 2015-17 Intel Corporation.
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+/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
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+/* Copyright(c) 2015-17 Intel Corporation. */
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 #ifndef __SDW_INTEL_H
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 #define __SDW_INTEL_H
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+#include <linux/irqreturn.h>
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+#include <linux/soundwire/sdw.h>
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+
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 /**
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- * struct sdw_intel_ops: Intel audio driver callback ops
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- *
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- * @config_stream: configure the stream with the hw_params
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+ * struct sdw_intel_stream_params_data: configuration passed during
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+ * the @params_stream callback, e.g. for interaction with DSP
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+ * firmware.
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  */
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-struct sdw_intel_ops {
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-	int (*config_stream)(void *arg, void *substream,
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-			void *dai, void *hw_params, int stream_num);
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+struct sdw_intel_stream_params_data {
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+	struct snd_pcm_substream *substream;
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+	struct snd_soc_dai *dai;
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+	struct snd_pcm_hw_params *hw_params;
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+	int link_id;
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+	int alh_stream_id;
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 };
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 /**
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- * struct sdw_intel_res - Soundwire Intel resource structure
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+ * struct sdw_intel_stream_free_data: configuration passed during
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+ * the @free_stream callback, e.g. for interaction with DSP
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+ * firmware.
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+ */
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+struct sdw_intel_stream_free_data {
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+	struct snd_pcm_substream *substream;
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+	struct snd_soc_dai *dai;
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+	int link_id;
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+};
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+
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+/**
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+ * struct sdw_intel_ops: Intel audio driver callback ops
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+ *
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+ */
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+struct sdw_intel_ops {
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+	int (*params_stream)(struct device *dev,
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+			     struct sdw_intel_stream_params_data *params_data);
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+	int (*free_stream)(struct device *dev,
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+			   struct sdw_intel_stream_free_data *free_data);
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+};
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+
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+/**
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+ * struct sdw_intel_acpi_info - Soundwire Intel information found in ACPI tables
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+ * @handle: ACPI controller handle
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+ * @count: link count found with "sdw-master-count" property
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+ * @link_mask: bit-wise mask listing links enabled by BIOS menu
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+ *
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+ * this structure could be expanded to e.g. provide all the _ADR
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+ * information in case the link_mask is not sufficient to identify
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+ * platform capabilities.
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+ */
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+struct sdw_intel_acpi_info {
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+	acpi_handle handle;
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+	int count;
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+	u32 link_mask;
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+};
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+
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+struct sdw_intel_link_res;
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+
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+/* Intel clock-stop/pm_runtime quirk definitions */
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+
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+/*
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+ * Force the clock to remain on during pm_runtime suspend. This might
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+ * be needed if Slave devices do not have an alternate clock source or
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+ * if the latency requirements are very strict.
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+ */
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+#define SDW_INTEL_CLK_STOP_NOT_ALLOWED		BIT(0)
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+
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+/*
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+ * Stop the bus during pm_runtime suspend. If set, a complete bus
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+ * reset and re-enumeration will be performed when the bus
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+ * restarts. This mode shall not be used if Slave devices can generate
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+ * in-band wakes.
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+ */
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+#define SDW_INTEL_CLK_STOP_TEARDOWN		BIT(1)
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+
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+/*
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+ * Stop the bus during pm_suspend if Slaves are not wake capable
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+ * (e.g. speaker amplifiers). The clock-stop mode is typically
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+ * slightly higher power than when the IP is completely powered-off.
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+ */
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+#define SDW_INTEL_CLK_STOP_WAKE_CAPABLE_ONLY	BIT(2)
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+
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+/*
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+ * Require a bus reset (and complete re-enumeration) when exiting
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+ * clock stop modes. This may be needed if the controller power was
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+ * turned off and all context lost. This quirk shall not be used if a
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+ * Slave device needs to remain enumerated and keep its context,
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+ * e.g. to provide the reasons for the wake, report acoustic events or
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+ * pass a history buffer.
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+ */
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+#define SDW_INTEL_CLK_STOP_BUS_RESET		BIT(3)
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+
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+struct sdw_intel_slave_id {
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+	int link_id;
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+	struct sdw_slave_id id;
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+};
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+
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+/**
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+ * struct sdw_intel_ctx - context allocated by the controller
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+ * driver probe
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+ * @count: link count
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+ * @mmio_base: mmio base of SoundWire registers, only used to check
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+ * hardware capabilities after all power dependencies are settled.
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+ * @link_mask: bit-wise mask listing SoundWire links reported by the
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+ * Controller
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+ * @num_slaves: total number of devices exposed across all enabled links
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+ * @handle: ACPI parent handle
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+ * @links: information for each link (controller-specific and kept
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+ * opaque here)
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+ * @ids: array of slave_id, representing Slaves exposed across all enabled
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+ * links
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+ * @link_list: list to handle interrupts across all links
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+ * @shim_lock: mutex to handle concurrent rmw access to shared SHIM registers.
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+ * @shim_mask: flags to track initialization of SHIM shared registers
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+ */
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+struct sdw_intel_ctx {
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+	int count;
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+	void __iomem *mmio_base;
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+	u32 link_mask;
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+	int num_slaves;
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+	acpi_handle handle;
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+	struct sdw_intel_link_res *links;
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+	struct sdw_intel_slave_id *ids;
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+	struct list_head link_list;
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+	struct mutex shim_lock; /* lock for access to shared SHIM registers */
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+	u32 shim_mask;
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+};
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+
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+/**
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+ * struct sdw_intel_res - Soundwire Intel global resource structure,
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+ * typically populated by the DSP driver
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+ *
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+ * @count: link count
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  * @mmio_base: mmio base of SoundWire registers
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  * @irq: interrupt number
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  * @handle: ACPI parent handle
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  * @parent: parent device
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  * @ops: callback ops
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- * @arg: callback arg
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+ * @dev: device implementing hwparams and free callbacks
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+ * @link_mask: bit-wise mask listing links selected by the DSP driver
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+ * This mask may be a subset of the one reported by the controller since
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+ * machine-specific quirks are handled in the DSP driver.
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+ * @clock_stop_quirks: mask array of possible behaviors requested by the
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+ * DSP driver. The quirks are common for all links for now.
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  */
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 struct sdw_intel_res {
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+	int count;
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 	void __iomem *mmio_base;
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 	int irq;
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 	acpi_handle handle;
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 	struct device *parent;
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 	const struct sdw_intel_ops *ops;
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-	void *arg;
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+	struct device *dev;
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+	u32 link_mask;
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+	u32 clock_stop_quirks;
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 };
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-void *sdw_intel_init(acpi_handle *parent_handle, struct sdw_intel_res *res);
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-void sdw_intel_exit(void *arg);
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+/*
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+ * On Intel platforms, the SoundWire IP has dependencies on power
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+ * rails shared with the DSP, and the initialization steps are split
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+ * in three. First an ACPI scan to check what the firmware describes
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+ * in DSDT tables, then an allocation step (with no hardware
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+ * configuration but with all the relevant devices created) and last
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+ * the actual hardware configuration. The final stage is a global
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+ * interrupt enable which is controlled by the DSP driver. Splitting
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+ * these phases helps simplify the boot flow and make early decisions
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+ * on e.g. which machine driver to select (I2S mode, HDaudio or
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+ * SoundWire).
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+ */
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+int sdw_intel_acpi_scan(acpi_handle *parent_handle,
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+			struct sdw_intel_acpi_info *info);
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+
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+void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx);
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+
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+struct sdw_intel_ctx *
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+sdw_intel_probe(struct sdw_intel_res *res);
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+
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+int sdw_intel_startup(struct sdw_intel_ctx *ctx);
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+
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+void sdw_intel_exit(struct sdw_intel_ctx *ctx);
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+
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+void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable);
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+
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+irqreturn_t sdw_intel_thread(int irq, void *dev_id);
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 #endif