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hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d 
 kernel/include/linux/rockchip/rockchip_sip.h
....@@ -52,6 +52,12 @@
5252 #define SIP_SDEI_FIQ_DBG_SWITCH_CPU	0x82000020
5353 #define SIP_SDEI_FIQ_DBG_GET_EVENT_ID	0x82000021
5454 #define RK_SIP_AMP_CFG			0x82000022
55
+#define RK_SIP_FIQ_CTRL			0x82000024
56
+#define SIP_HDCP_CONFIG			0x82000025
57
+#define SIP_WDT_CFG			0x82000026
58
+#define SIP_HDMIRX_CFG			0x82000027
59
+
60
+#define TRUSTED_OS_HDCPKEY_INIT		0xB7000003
5561 
5662 /* Rockchip Sip version */
5763 #define SIP_IMPLEMENT_V1                (1)
....@@ -100,6 +106,8 @@
100106 #define VIRTUAL_POWEROFF		0x07
101107 #define SUSPEND_WFI_TIME_MS		0x08
102108 #define LINUX_PM_STATE			0x09
109
+#define SUSPEND_IO_RET_CONFIG		0x0a
110
+#define SLEEP_PIN_CONFIG		0x0b
103111 
104112 /* SIP_REMOTECTL_CFG call types */
105113 #define	REMOTECTL_SET_IRQ		0xf0
....@@ -109,6 +117,16 @@
109117 #define REMOTECTL_ENABLE		0xf4
110118 /* wakeup state */
111119 #define REMOTECTL_PWRKEY_WAKEUP		0xdeadbeaf
120
+
121
+struct dram_addrmap_info {
122
+	u64 ch_mask[2];
123
+	u64 bk_mask[4];
124
+	u64 bg_mask[2];
125
+	u64 cs_mask[2];
126
+	u32 reserved[20];
127
+	u32 bank_bit_first;
128
+	u32 bank_bit_mask;
129
+};
112130 
113131 /* AMP Ctrl */
114132 enum {
....@@ -120,16 +138,6 @@
120138 	RK_AMP_SUB_FUNC_RSV, /* for RTOS */
121139 	RK_AMP_SUB_FUNC_CPU_ON,
122140 	RK_AMP_SUB_FUNC_END,
123
-};
124
-
125
-struct dram_addrmap_info {
126
-	u64 ch_mask[2];
127
-	u64 bk_mask[4];
128
-	u64 bg_mask[2];
129
-	u64 cs_mask[2];
130
-	u32 reserved[20];
131
-	u32 bank_bit_first;
132
-	u32 bank_bit_mask;
133141 };
134142 
135143 enum {
....@@ -150,8 +158,52 @@
150158 	SHARE_PAGE_TYPE_DDRFSP,
151159 	SHARE_PAGE_TYPE_DDR_ADDRMAP,
152160 	SHARE_PAGE_TYPE_LAST_LOG,
161
+	SHARE_PAGE_TYPE_HDCP,
153162 	SHARE_PAGE_TYPE_MAX,
154163 } share_page_type_t;
164
+
165
+/* fiq control sub func */
166
+enum {
167
+	RK_SIP_FIQ_CTRL_FIQ_EN = 1,
168
+	RK_SIP_FIQ_CTRL_FIQ_DIS,
169
+	RK_SIP_FIQ_CTRL_SET_AFF
170
+};
171
+
172
+/* hdcp function types */
173
+enum {
174
+	HDCP_FUNC_STORAGE_INCRYPT = 1,
175
+	HDCP_FUNC_KEY_LOAD,
176
+	HDCP_FUNC_ENCRYPT_MODE
177
+};
178
+
179
+/* support hdcp device list */
180
+enum {
181
+	DP_TX0,
182
+	DP_TX1,
183
+	EDP_TX0,
184
+	EDP_TX1,
185
+	HDMI_TX0,
186
+	HDMI_TX1,
187
+	HDMI_RX,
188
+	MAX_DEVICE,
189
+};
190
+
191
+/* SIP_WDT_CONFIG call types  */
192
+enum {
193
+	WDT_START = 0,
194
+	WDT_STOP = 1,
195
+	WDT_PING = 2,
196
+};
197
+
198
+/* SIP_HDMIRX_CONFIG child configs */
199
+enum {
200
+	HDMIRX_AUTO_TOUCH_EN = 0,
201
+	HDMIRX_REG_PRE_FETCH = 1,
202
+	HDMIRX_INFO_NOTIFY = 2,
203
+};
204
+
205
+struct pt_regs;
206
+typedef void (*sip_fiq_debugger_uart_irq_tf_cb_t)(struct pt_regs *_pt_regs, unsigned long cpu);
155207 
156208 /*
157209  * Rules: struct arm_smccc_res contains result and data, details:
....@@ -159,7 +211,7 @@
159211  * a0: error code(0: success, !0: error);
160212  * a1~a3: data
161213  */
162
-#if IS_ENABLED(CONFIG_ROCKCHIP_SIP)
214
+#if IS_REACHABLE(CONFIG_ROCKCHIP_SIP)
163215 struct arm_smccc_res sip_smc_get_atf_version(void);
164216 struct arm_smccc_res sip_smc_get_sip_version(void);
165217 struct arm_smccc_res sip_smc_dram(u32 arg0, u32 arg1, u32 arg2);
....@@ -177,14 +229,17 @@
177229 int sip_smc_secure_reg_write(u32 addr_phy, u32 val);
178230 u32 sip_smc_secure_reg_read(u32 addr_phy);
179231 struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2);
232
+struct dram_addrmap_info *sip_smc_get_dram_map(void);
180233 int sip_smc_amp_config(u32 sub_func_id, u32 arg1, u32 arg2, u32 arg3);
181234 struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, u32 arg1);
182
-struct dram_addrmap_info *sip_smc_get_dram_map(void);
183235 
236
+void __iomem *sip_hdcp_request_share_memory(int id);
237
+struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2);
238
+ulong sip_cpu_logical_map_mpidr(u32 cpu);
184239 /***************************fiq debugger **************************************/
185240 void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu);
186241 void sip_fiq_debugger_enable_debug(bool enable);
187
-int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback_fn);
242
+int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, sip_fiq_debugger_uart_irq_tf_cb_t callback_fn);
188243 int sip_fiq_debugger_set_print_port(u32 port_phyaddr, u32 baudrate);
189244 int sip_fiq_debugger_request_share_memory(void);
190245 int sip_fiq_debugger_get_target_cpu(void);
....@@ -192,49 +247,59 @@
192247 int sip_fiq_debugger_sdei_switch_cpu(u32 cur_cpu, u32 target_cpu, u32 flag);
193248 int sip_fiq_debugger_is_enabled(void);
194249 int sip_fiq_debugger_sdei_get_event_id(u32 *fiq, u32 *sw_cpu, u32 *flag);
250
+int sip_fiq_control(u32 sub_func, u32 irq, unsigned long data);
251
+int sip_wdt_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3);
252
+int sip_hdmirx_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3);
253
+int sip_hdcpkey_init(u32 hdcp_id);
195254 #else
196255 static inline struct arm_smccc_res sip_smc_get_atf_version(void)
197256 {
198
-	struct arm_smccc_res tmp = {0};
257
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
199258 	return tmp;
200259 }
201260 
202261 static inline struct arm_smccc_res sip_smc_get_sip_version(void)
203262 {
204
-	struct arm_smccc_res tmp = {0};
263
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
205264 	return tmp;
206265 }
207266 
208267 static inline struct arm_smccc_res sip_smc_dram(u32 arg0, u32 arg1, u32 arg2)
209268 {
210
-	struct arm_smccc_res tmp = {0};
269
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
211270 	return tmp;
212271 }
213272 
214273 static inline struct arm_smccc_res sip_smc_request_share_mem
215274 			(u32 page_num, share_page_type_t page_type)
216275 {
217
-	struct arm_smccc_res tmp = {0};
276
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
218277 	return tmp;
219278 }
220279 
221280 static inline struct arm_smccc_res sip_smc_mcu_el3fiq
222281 			(u32 arg0, u32 arg1, u32 arg2)
223282 {
224
-	struct arm_smccc_res tmp = {0};
283
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
225284 	return tmp;
226285 }
227286 
228287 static inline struct arm_smccc_res
229288 sip_smc_vpu_reset(u32 arg0, u32 arg1, u32 arg2)
230289 {
231
-	struct arm_smccc_res tmp = {0};
290
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
291
+	return tmp;
292
+}
293
+
294
+static inline struct arm_smccc_res sip_smc_get_suspend_info(u32 info)
295
+{
296
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
232297 	return tmp;
233298 }
234299 
235300 static inline struct arm_smccc_res sip_smc_lastlog_request(void)
236301 {
237
-	struct arm_smccc_res tmp = {0};
302
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
238303 	return tmp;
239304 }
240305 
....@@ -243,19 +308,17 @@
243308 	return 0;
244309 }
245310 
246
-static inline int sip_smc_get_suspend_info(u32 info)
247
-{
248
-	return 0;
249
-}
250
-
251311 static inline int sip_smc_virtual_poweroff(void) { return 0; }
252312 static inline int sip_smc_remotectl_config(u32 func, u32 data) { return 0; }
253
-static inline u32 sip_smc_secure_reg_read(u32 addr_phy) { return 0; }
254313 static inline int sip_smc_secure_reg_write(u32 addr_phy, u32 val) { return 0; }
255
-static inline int sip_smc_soc_bus_div(u32 arg0, u32 arg1, u32 arg2)
314
+static inline u32 sip_smc_secure_reg_read(u32 addr_phy) { return 0; }
315
+
316
+static inline struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2)
256317 {
257
-	return 0;
318
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
319
+	return tmp;
258320 }
321
+
259322 static inline struct dram_addrmap_info *sip_smc_get_dram_map(void)
260323 {
261324 	return NULL;
....@@ -277,13 +340,27 @@
277340 	return tmp;
278341 }
279342 
343
+static inline void __iomem *sip_hdcp_request_share_memory(int id)
344
+{
345
+	return NULL;
346
+}
347
+
348
+static inline struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2)
349
+{
350
+	struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED };
351
+
352
+	return tmp;
353
+}
354
+
355
+static inline ulong sip_cpu_logical_map_mpidr(u32 cpu) { return 0; }
356
+
280357 /***************************fiq debugger **************************************/
281358 static inline void sip_fiq_debugger_enable_fiq
282359 			(bool enable, uint32_t tgt_cpu) { return; }
283360 
284361 static inline void sip_fiq_debugger_enable_debug(bool enable) { return; }
285362 static inline int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id,
286
-						    void *callback_fn)
363
+						    sip_fiq_debugger_uart_irq_tf_cb_t callback_fn)
287364 {
288365 	return 0;
289366 }
....@@ -300,6 +377,36 @@
300377 static inline int sip_fiq_debugger_sdei_switch_cpu(u32 cur_cpu, u32 target_cpu,
301378 						   u32 flag) { return 0; }
302379 static inline int sip_fiq_debugger_is_enabled(void) { return 0; }
380
+static inline int sip_fiq_debugger_sdei_get_event_id(u32 *fiq, u32 *sw_cpu, u32 *flag)
381
+{
382
+	return SIP_RET_NOT_SUPPORTED;
383
+}
384
+
385
+static inline int sip_fiq_control(u32 sub_func, u32 irq, unsigned long data)
386
+{
387
+	return 0;
388
+}
389
+
390
+static inline int sip_wdt_config(u32 sub_func,
391
+				 u32 arg1,
392
+				 u32 arg2,
393
+				 u32 arg3)
394
+{
395
+	return 0;
396
+}
397
+
398
+static inline int sip_hdmirx_config(u32 sub_func,
399
+				    u32 arg1,
400
+				    u32 arg2,
401
+				    u32 arg3)
402
+{
403
+	return SIP_RET_NOT_SUPPORTED;
404
+}
405
+
406
+static inline int sip_hdcpkey_init(u32 hdcp_id)
407
+{
408
+	return 0;
409
+}
303410 #endif
304411 
305412 /* 32-bit OP-TEE context, never change order of members! */