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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d 
 kernel/include/linux/regmap.h
....@@ -1,3 +1,4 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 #ifndef __LINUX_REGMAP_H
23 #define __LINUX_REGMAP_H
34 
....@@ -7,10 +8,6 @@
78  * Copyright 2011 Wolfson Microelectronics plc
89  *
910  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
10
- *
11
- * This program is free software; you can redistribute it and/or modify
12
- * it under the terms of the GNU General Public License version 2 as
13
- * published by the Free Software Foundation.
1411  */
1512 
1613 #include <linux/list.h>
....@@ -20,11 +17,16 @@
2017 #include <linux/err.h>
2118 #include <linux/bug.h>
2219 #include <linux/lockdep.h>
20
+#include <linux/iopoll.h>
21
+#include <linux/fwnode.h>
22
+#include <linux/android_kabi.h>
2323 
2424 struct module;
2525 struct clk;
2626 struct device;
27
+struct device_node;
2728 struct i2c_client;
29
+struct i3c_device;
2830 struct irq_domain;
2931 struct slim_device;
3032 struct spi_device;
....@@ -73,35 +75,12 @@
7375 	unsigned int delay_us;
7476 };
7577 
76
-#define	regmap_update_bits(map, reg, mask, val) \
77
-	regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
78
-#define	regmap_update_bits_async(map, reg, mask, val)\
79
-	regmap_update_bits_base(map, reg, mask, val, NULL, true, false)
80
-#define	regmap_update_bits_check(map, reg, mask, val, change)\
81
-	regmap_update_bits_base(map, reg, mask, val, change, false, false)
82
-#define	regmap_update_bits_check_async(map, reg, mask, val, change)\
83
-	regmap_update_bits_base(map, reg, mask, val, change, true, false)
84
-
85
-#define	regmap_write_bits(map, reg, mask, val) \
86
-	regmap_update_bits_base(map, reg, mask, val, NULL, false, true)
87
-
88
-#define	regmap_field_write(field, val) \
89
-	regmap_field_update_bits_base(field, ~0, val, NULL, false, false)
90
-#define	regmap_field_force_write(field, val) \
91
-	regmap_field_update_bits_base(field, ~0, val, NULL, false, true)
92
-#define	regmap_field_update_bits(field, mask, val)\
93
-	regmap_field_update_bits_base(field, mask, val, NULL, false, false)
94
-#define	regmap_field_force_update_bits(field, mask, val) \
95
-	regmap_field_update_bits_base(field, mask, val, NULL, false, true)
96
-
97
-#define	regmap_fields_write(field, id, val) \
98
-	regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, false)
99
-#define	regmap_fields_force_write(field, id, val) \
100
-	regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, true)
101
-#define	regmap_fields_update_bits(field, id, mask, val)\
102
-	regmap_fields_update_bits_base(field, id, mask, val, NULL, false, false)
103
-#define	regmap_fields_force_update_bits(field, id, mask, val) \
104
-	regmap_fields_update_bits_base(field, id, mask, val, NULL, false, true)
78
+#define REG_SEQ(_reg, _def, _delay_us) {		\
79
+				.reg = _reg,		\
80
+				.def = _def,		\
81
+				.delay_us = _delay_us,	\
82
+				}
83
+#define REG_SEQ0(_reg, _def)	REG_SEQ(_reg, _def, 0)
10584 
10685 /**
10786  * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
....@@ -112,7 +91,7 @@
11291  * @cond: Break condition (usually involving @val)
11392  * @sleep_us: Maximum time to sleep between reads in us (0
11493  *            tight-loops).  Should be less than ~20ms since usleep_range
115
- *            is used (see Documentation/timers/timers-howto.txt).
94
+ *            is used (see Documentation/timers/timers-howto.rst).
11695  * @timeout_us: Timeout in us, 0 means never timeout
11796  *
11897  * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
....@@ -124,26 +103,10 @@
124103  */
125104 #define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
126105 ({ \
127
-	u64 __timeout_us = (timeout_us); \
128
-	unsigned long __sleep_us = (sleep_us); \
129
-	ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
130
-	int __ret; \
131
-	might_sleep_if(__sleep_us); \
132
-	for (;;) { \
133
-		__ret = regmap_read((map), (addr), &(val)); \
134
-		if (__ret) \
135
-			break; \
136
-		if (cond) \
137
-			break; \
138
-		if ((__timeout_us) && \
139
-		    ktime_compare(ktime_get(), __timeout) > 0) { \
140
-			__ret = regmap_read((map), (addr), &(val)); \
141
-			break; \
142
-		} \
143
-		if (__sleep_us) \
144
-			usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
145
-	} \
146
-	__ret ?: ((cond) ? 0 : -ETIMEDOUT); \
106
+	int __ret, __tmp; \
107
+	__tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \
108
+			sleep_us, timeout_us, false, (map), (addr), &(val)); \
109
+	__ret ?: __tmp; \
147110 })
148111 
149112 /**
....@@ -199,7 +162,7 @@
199162  * @cond: Break condition (usually involving @val)
200163  * @sleep_us: Maximum time to sleep between reads in us (0
201164  *            tight-loops).  Should be less than ~20ms since usleep_range
202
- *            is used (see Documentation/timers/timers-howto.txt).
165
+ *            is used (see Documentation/timers/timers-howto.rst).
203166  * @timeout_us: Timeout in us, 0 means never timeout
204167  *
205168  * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
....@@ -211,25 +174,10 @@
211174  */
212175 #define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
213176 ({ \
214
-	u64 __timeout_us = (timeout_us); \
215
-	unsigned long __sleep_us = (sleep_us); \
216
-	ktime_t timeout = ktime_add_us(ktime_get(), __timeout_us); \
217
-	int pollret; \
218
-	might_sleep_if(__sleep_us); \
219
-	for (;;) { \
220
-		pollret = regmap_field_read((field), &(val)); \
221
-		if (pollret) \
222
-			break; \
223
-		if (cond) \
224
-			break; \
225
-		if (__timeout_us && ktime_compare(ktime_get(), timeout) > 0) { \
226
-			pollret = regmap_field_read((field), &(val)); \
227
-			break; \
228
-		} \
229
-		if (__sleep_us) \
230
-			usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
231
-	} \
232
-	pollret ?: ((cond) ? 0 : -ETIMEDOUT); \
177
+	int __ret, __tmp; \
178
+	__tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \
179
+			sleep_us, timeout_us, false, (field), &(val)); \
180
+	__ret ?: __tmp; \
233181 })
234182 
235183 #ifdef CONFIG_REGMAP
....@@ -313,6 +261,13 @@
313261  *                field is NULL but precious_table (see below) is not, the
314262  *                check is performed on such table (a register is precious if
315263  *                it belongs to one of the ranges specified by precious_table).
264
+ * @writeable_noinc_reg: Optional callback returning true if the register
265
+ *			supports multiple write operations without incrementing
266
+ *			the register number. If this field is NULL but
267
+ *			wr_noinc_table (see below) is not, the check is
268
+ *			performed on such table (a register is no increment
269
+ *			writeable if it belongs to one of the ranges specified
270
+ *			by wr_noinc_table).
316271  * @readable_noinc_reg: Optional callback returning true if the register
317272  *			supports multiple read operations without incrementing
318273  *			the register number. If this field is NULL but
....@@ -321,7 +276,7 @@
321276  *			readable if it belongs to one of the ranges specified
322277  *			by rd_noinc_table).
323278  * @disable_locking: This regmap is either protected by external means or
324
- *                   is guaranteed not be be accessed from multiple threads.
279
+ *                   is guaranteed not to be accessed from multiple threads.
325280  *                   Don't use any locking mechanisms.
326281  * @lock:	  Optional lock callback (overrides regmap's default lock
327282  *		  function, based on spinlock or mutex).
....@@ -347,6 +302,7 @@
347302  * @rd_table:     As above, for read access.
348303  * @volatile_table: As above, for volatile registers.
349304  * @precious_table: As above, for precious registers.
305
+ * @wr_noinc_table: As above, for no increment writeable registers.
350306  * @rd_noinc_table: As above, for no increment readable registers.
351307  * @reg_defaults: Power on reset values for registers (for use with
352308  *                register cache support).
....@@ -360,9 +316,12 @@
360316  *                   masks are used.
361317  * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
362318  *                   if they are both empty.
363
- * @use_single_rw: If set, converts the bulk read and write operations into
364
- *		    a series of single read and write operations. This is useful
365
- *		    for device that does not support bulk read and write.
319
+ * @use_single_read: If set, converts the bulk read operation into a series of
320
+ *                   single read operations. This is useful for a device that
321
+ *                   does not support  bulk read.
322
+ * @use_single_write: If set, converts the bulk write operation into a series of
323
+ *                    single write operations. This is useful for a device that
324
+ *                    does not support bulk write.
366325  * @can_multi_write: If set, the device supports the multi write mode of bulk
367326  *                   write operations, if clear multi write requests will be
368327  *                   split into individual write operations
....@@ -384,6 +343,7 @@
384343  * @hwlock_id: Specify the hardware spinlock id.
385344  * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
386345  *		 HWLOCK_IRQ or 0.
346
+ * @can_sleep: Optional, specifies whether regmap operations can sleep.
387347  */
388348 struct regmap_config {
389349 	const char *name;
....@@ -397,6 +357,7 @@
397357 	bool (*readable_reg)(struct device *dev, unsigned int reg);
398358 	bool (*volatile_reg)(struct device *dev, unsigned int reg);
399359 	bool (*precious_reg)(struct device *dev, unsigned int reg);
360
+	bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
400361 	bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);
401362 
402363 	bool disable_locking;
....@@ -414,6 +375,7 @@
414375 	const struct regmap_access_table *rd_table;
415376 	const struct regmap_access_table *volatile_table;
416377 	const struct regmap_access_table *precious_table;
378
+	const struct regmap_access_table *wr_noinc_table;
417379 	const struct regmap_access_table *rd_noinc_table;
418380 	const struct reg_default *reg_defaults;
419381 	unsigned int num_reg_defaults;
....@@ -425,7 +387,8 @@
425387 	unsigned long write_flag_mask;
426388 	bool zero_flag_mask;
427389 
428
-	bool use_single_rw;
390
+	bool use_single_read;
391
+	bool use_single_write;
429392 	bool can_multi_write;
430393 
431394 	enum regmap_endian reg_format_endian;
....@@ -437,6 +400,10 @@
437400 	bool use_hwlock;
438401 	unsigned int hwlock_id;
439402 	unsigned int hwlock_mode;
403
+
404
+	bool can_sleep;
405
+
406
+	ANDROID_KABI_RESERVE(1);
440407 };
441408 
442409 /**
....@@ -449,8 +416,8 @@
449416  * @range_max: Address of the highest register in virtual range.
450417  *
451418  * @selector_reg: Register with selector field.
452
- * @selector_mask: Bit shift for selector value.
453
- * @selector_shift: Bit mask for selector value.
419
+ * @selector_mask: Bit mask for selector value.
420
+ * @selector_shift: Bit shift for selector value.
454421  *
455422  * @window_start: Address of first (lowest) register in data window.
456423  * @window_len: Number of registers in data window.
....@@ -474,6 +441,8 @@
474441 	/* Data window (per each page) */
475442 	unsigned int window_start;
476443 	unsigned int window_len;
444
+
445
+	ANDROID_KABI_RESERVE(1);
477446 };
478447 
479448 struct regmap_async;
....@@ -550,6 +519,8 @@
550519 	enum regmap_endian val_format_endian_default;
551520 	size_t max_raw_read;
552521 	size_t max_raw_write;
522
+
523
+	ANDROID_KABI_RESERVE(1);
553524 };
554525 
555526 /*
....@@ -606,6 +577,10 @@
606577 				 const struct regmap_config *config,
607578 				 struct lock_class_key *lock_key,
608579 				 const char *lock_name);
580
+struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
581
+				      const struct regmap_config *config,
582
+				      struct lock_class_key *lock_key,
583
+				      const char *lock_name);
609584 
610585 struct regmap *__devm_regmap_init(struct device *dev,
611586 				  const struct regmap_bus *bus,
....@@ -655,6 +630,14 @@
655630 				 const struct regmap_config *config,
656631 				 struct lock_class_key *lock_key,
657632 				 const char *lock_name);
633
+struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
634
+				 const struct regmap_config *config,
635
+				 struct lock_class_key *lock_key,
636
+				 const char *lock_name);
637
+struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
638
+					   const struct regmap_config *config,
639
+					   struct lock_class_key *lock_key,
640
+					   const char *lock_name);
658641 /*
659642  * Wrapper for regmap_init macros to include a unique lockdep key and name
660643  * for each call. No-op if CONFIG_LOCKDEP is not set.
....@@ -841,6 +824,19 @@
841824 	__regmap_lockdep_wrapper(__regmap_init_sdw, #config,		\
842825 				sdw, config)
843826 
827
+/**
828
+ * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
829
+ * to AVMM Bus Bridge
830
+ *
831
+ * @spi: Device that will be interacted with
832
+ * @config: Configuration for register map
833
+ *
834
+ * The return value will be an ERR_PTR() on error or a valid pointer
835
+ * to a struct regmap.
836
+ */
837
+#define regmap_init_spi_avmm(spi, config)					\
838
+	__regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config,		\
839
+				 spi, config)
844840 
845841 /**
846842  * devm_regmap_init() - Initialise managed register map
....@@ -1013,6 +1009,36 @@
10131009 #define devm_regmap_init_slimbus(slimbus, config)			\
10141010 	__regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config,	\
10151011 				slimbus, config)
1012
+
1013
+/**
1014
+ * devm_regmap_init_i3c() - Initialise managed register map
1015
+ *
1016
+ * @i3c: Device that will be interacted with
1017
+ * @config: Configuration for register map
1018
+ *
1019
+ * The return value will be an ERR_PTR() on error or a valid pointer
1020
+ * to a struct regmap.  The regmap will be automatically freed by the
1021
+ * device management code.
1022
+ */
1023
+#define devm_regmap_init_i3c(i3c, config)				\
1024
+	__regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config,	\
1025
+				i3c, config)
1026
+
1027
+/**
1028
+ * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
1029
+ * to AVMM Bus Bridge
1030
+ *
1031
+ * @spi: Device that will be interacted with
1032
+ * @config: Configuration for register map
1033
+ *
1034
+ * The return value will be an ERR_PTR() on error or a valid pointer
1035
+ * to a struct regmap.  The map will be automatically freed by the
1036
+ * device management code.
1037
+ */
1038
+#define devm_regmap_init_spi_avmm(spi, config)				\
1039
+	__regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config,	\
1040
+				 spi, config)
1041
+
10161042 int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
10171043 void regmap_mmio_detach_clk(struct regmap *map);
10181044 void regmap_exit(struct regmap *map);
....@@ -1023,6 +1049,8 @@
10231049 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
10241050 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
10251051 int regmap_raw_write(struct regmap *map, unsigned int reg,
1052
+		     const void *val, size_t val_len);
1053
+int regmap_noinc_write(struct regmap *map, unsigned int reg,
10261054 		     const void *val, size_t val_len);
10271055 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
10281056 			size_t val_count);
....@@ -1043,6 +1071,42 @@
10431071 int regmap_update_bits_base(struct regmap *map, unsigned int reg,
10441072 			    unsigned int mask, unsigned int val,
10451073 			    bool *change, bool async, bool force);
1074
+
1075
+static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1076
+				     unsigned int mask, unsigned int val)
1077
+{
1078
+	return regmap_update_bits_base(map, reg, mask, val, NULL, false, false);
1079
+}
1080
+
1081
+static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1082
+					   unsigned int mask, unsigned int val)
1083
+{
1084
+	return regmap_update_bits_base(map, reg, mask, val, NULL, true, false);
1085
+}
1086
+
1087
+static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1088
+					   unsigned int mask, unsigned int val,
1089
+					   bool *change)
1090
+{
1091
+	return regmap_update_bits_base(map, reg, mask, val,
1092
+				       change, false, false);
1093
+}
1094
+
1095
+static inline int
1096
+regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1097
+			       unsigned int mask, unsigned int val,
1098
+			       bool *change)
1099
+{
1100
+	return regmap_update_bits_base(map, reg, mask, val,
1101
+				       change, true, false);
1102
+}
1103
+
1104
+static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1105
+				    unsigned int mask, unsigned int val)
1106
+{
1107
+	return regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
1108
+}
1109
+
10461110 int regmap_get_val_bytes(struct regmap *map);
10471111 int regmap_get_max_register(struct regmap *map);
10481112 int regmap_get_reg_stride(struct regmap *map);
....@@ -1078,6 +1142,21 @@
10781142 			  const struct regmap_range *ranges,
10791143 			  unsigned int nranges);
10801144 
1145
+static inline int regmap_set_bits(struct regmap *map,
1146
+				  unsigned int reg, unsigned int bits)
1147
+{
1148
+	return regmap_update_bits_base(map, reg, bits, bits,
1149
+				       NULL, false, false);
1150
+}
1151
+
1152
+static inline int regmap_clear_bits(struct regmap *map,
1153
+				    unsigned int reg, unsigned int bits)
1154
+{
1155
+	return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
1156
+}
1157
+
1158
+int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
1159
+
10811160 /**
10821161  * struct reg_field - Description of an register field
10831162  *
....@@ -1101,6 +1180,14 @@
11011180 				.msb = _msb,	\
11021181 				}
11031182 
1183
+#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) {	\
1184
+				.reg = _reg,			\
1185
+				.lsb = _lsb,			\
1186
+				.msb = _msb,			\
1187
+				.id_size = _size,		\
1188
+				.id_offset = _offset,		\
1189
+				}
1190
+
11041191 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
11051192 		struct reg_field reg_field);
11061193 void regmap_field_free(struct regmap_field *field);
....@@ -1108,6 +1195,17 @@
11081195 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
11091196 		struct regmap *regmap, struct reg_field reg_field);
11101197 void devm_regmap_field_free(struct device *dev,	struct regmap_field *field);
1198
+
1199
+int regmap_field_bulk_alloc(struct regmap *regmap,
1200
+			     struct regmap_field **rm_field,
1201
+			     struct reg_field *reg_field,
1202
+			     int num_fields);
1203
+void regmap_field_bulk_free(struct regmap_field *field);
1204
+int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
1205
+				 struct regmap_field **field,
1206
+				 struct reg_field *reg_field, int num_fields);
1207
+void devm_regmap_field_bulk_free(struct device *dev,
1208
+				 struct regmap_field *field);
11111209 
11121210 int regmap_field_read(struct regmap_field *field, unsigned int *val);
11131211 int regmap_field_update_bits_base(struct regmap_field *field,
....@@ -1119,21 +1217,95 @@
11191217 				   unsigned int mask, unsigned int val,
11201218 				   bool *change, bool async, bool force);
11211219 
1220
+static inline int regmap_field_write(struct regmap_field *field,
1221
+				     unsigned int val)
1222
+{
1223
+	return regmap_field_update_bits_base(field, ~0, val,
1224
+					     NULL, false, false);
1225
+}
1226
+
1227
+static inline int regmap_field_force_write(struct regmap_field *field,
1228
+					   unsigned int val)
1229
+{
1230
+	return regmap_field_update_bits_base(field, ~0, val, NULL, false, true);
1231
+}
1232
+
1233
+static inline int regmap_field_update_bits(struct regmap_field *field,
1234
+					   unsigned int mask, unsigned int val)
1235
+{
1236
+	return regmap_field_update_bits_base(field, mask, val,
1237
+					     NULL, false, false);
1238
+}
1239
+
1240
+static inline int
1241
+regmap_field_force_update_bits(struct regmap_field *field,
1242
+			       unsigned int mask, unsigned int val)
1243
+{
1244
+	return regmap_field_update_bits_base(field, mask, val,
1245
+					     NULL, false, true);
1246
+}
1247
+
1248
+static inline int regmap_fields_write(struct regmap_field *field,
1249
+				      unsigned int id, unsigned int val)
1250
+{
1251
+	return regmap_fields_update_bits_base(field, id, ~0, val,
1252
+					      NULL, false, false);
1253
+}
1254
+
1255
+static inline int regmap_fields_force_write(struct regmap_field *field,
1256
+					    unsigned int id, unsigned int val)
1257
+{
1258
+	return regmap_fields_update_bits_base(field, id, ~0, val,
1259
+					      NULL, false, true);
1260
+}
1261
+
1262
+static inline int
1263
+regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1264
+			  unsigned int mask, unsigned int val)
1265
+{
1266
+	return regmap_fields_update_bits_base(field, id, mask, val,
1267
+					      NULL, false, false);
1268
+}
1269
+
1270
+static inline int
1271
+regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1272
+				unsigned int mask, unsigned int val)
1273
+{
1274
+	return regmap_fields_update_bits_base(field, id, mask, val,
1275
+					      NULL, false, true);
1276
+}
1277
+
1278
+/**
1279
+ * struct regmap_irq_type - IRQ type definitions.
1280
+ *
1281
+ * @type_reg_offset: Offset register for the irq type setting.
1282
+ * @type_rising_val: Register value to configure RISING type irq.
1283
+ * @type_falling_val: Register value to configure FALLING type irq.
1284
+ * @type_level_low_val: Register value to configure LEVEL_LOW type irq.
1285
+ * @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
1286
+ * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
1287
+ */
1288
+struct regmap_irq_type {
1289
+	unsigned int type_reg_offset;
1290
+	unsigned int type_reg_mask;
1291
+	unsigned int type_rising_val;
1292
+	unsigned int type_falling_val;
1293
+	unsigned int type_level_low_val;
1294
+	unsigned int type_level_high_val;
1295
+	unsigned int types_supported;
1296
+};
1297
+
11221298 /**
11231299  * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
11241300  *
11251301  * @reg_offset: Offset of the status/mask register within the bank
11261302  * @mask:       Mask used to flag/control the register.
1127
- * @type_reg_offset: Offset register for the irq type setting.
1128
- * @type_rising_mask: Mask bit to configure RISING type irq.
1129
- * @type_falling_mask: Mask bit to configure FALLING type irq.
1303
+ * @type:	IRQ trigger type setting details if supported.
11301304  */
11311305 struct regmap_irq {
11321306 	unsigned int reg_offset;
11331307 	unsigned int mask;
1134
-	unsigned int type_reg_offset;
1135
-	unsigned int type_rising_mask;
1136
-	unsigned int type_falling_mask;
1308
+	struct regmap_irq_type type;
11371309 };
11381310 
11391311 #define REGMAP_IRQ_REG(_irq, _off, _mask)		\
....@@ -1145,10 +1317,36 @@
11451317 		.reg_offset = (_id) / (_reg_bits),	\
11461318 	}
11471319 
1320
+#define REGMAP_IRQ_MAIN_REG_OFFSET(arr)				\
1321
+	{ .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }
1322
+
1323
+struct regmap_irq_sub_irq_map {
1324
+	unsigned int num_regs;
1325
+	unsigned int *offset;
1326
+};
1327
+
11481328 /**
11491329  * struct regmap_irq_chip - Description of a generic regmap irq_chip.
11501330  *
11511331  * @name:        Descriptive name for IRQ controller.
1332
+ *
1333
+ * @main_status: Base main status register address. For chips which have
1334
+ *		 interrupts arranged in separate sub-irq blocks with own IRQ
1335
+ *		 registers and which have a main IRQ registers indicating
1336
+ *		 sub-irq blocks with unhandled interrupts. For such chips fill
1337
+ *		 sub-irq register information in status_base, mask_base and
1338
+ *		 ack_base.
1339
+ * @num_main_status_bits: Should be given to chips where number of meaningfull
1340
+ *			  main status bits differs from num_regs.
1341
+ * @sub_reg_offsets: arrays of mappings from main register bits to sub irq
1342
+ *		     registers. First item in array describes the registers
1343
+ *		     for first main status bit. Second array for second bit etc.
1344
+ *		     Offset is given as sub register status offset to
1345
+ *		     status_base. Should contain num_regs arrays.
1346
+ *		     Can be provided for chips with more complex mapping than
1347
+ *		     1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
1348
+ * @num_main_regs: Number of 'main status' irq registers for chips which have
1349
+ *		   main_status set.
11521350  *
11531351  * @status_base: Base status register address.
11541352  * @mask_base:   Base mask register address.
....@@ -1164,8 +1362,15 @@
11641362  * @mask_invert: Inverted mask register: cleared bits are masked out.
11651363  * @use_ack:     Use @ack register even if it is zero.
11661364  * @ack_invert:  Inverted ack register: cleared bits for ack.
1365
+ * @clear_ack:  Use this to set 1 and 0 or vice-versa to clear interrupts.
11671366  * @wake_invert: Inverted wake register: cleared bits are wake enabled.
11681367  * @type_invert: Invert the type flags.
1368
+ * @type_in_mask: Use the mask registers for controlling irq type. For
1369
+ *                interrupts defining type_rising/falling_mask use mask_base
1370
+ *                for edge configuration and never update bits in type_base.
1371
+ * @clear_on_unmask: For chips with interrupts cleared on read: read the status
1372
+ *                   registers before unmasking interrupts to clear any bits
1373
+ *                   set when they were masked.
11691374  * @runtime_pm:  Hold a runtime PM lock on the device when accessing it.
11701375  *
11711376  * @num_regs:    Number of registers in each control bank.
....@@ -1189,6 +1394,11 @@
11891394 struct regmap_irq_chip {
11901395 	const char *name;
11911396 
1397
+	unsigned int main_status;
1398
+	unsigned int num_main_status_bits;
1399
+	struct regmap_irq_sub_irq_map *sub_reg_offsets;
1400
+	int num_main_regs;
1401
+
11921402 	unsigned int status_base;
11931403 	unsigned int mask_base;
11941404 	unsigned int unmask_base;
....@@ -1196,15 +1406,17 @@
11961406 	unsigned int wake_base;
11971407 	unsigned int type_base;
11981408 	unsigned int irq_reg_stride;
1199
-	unsigned int clear_ack;
12001409 	bool mask_writeonly:1;
12011410 	bool init_ack_masked:1;
12021411 	bool mask_invert:1;
12031412 	bool use_ack:1;
12041413 	bool ack_invert:1;
1414
+	bool clear_ack:1;
12051415 	bool wake_invert:1;
12061416 	bool runtime_pm:1;
12071417 	bool type_invert:1;
1418
+	bool type_in_mask:1;
1419
+	bool clear_on_unmask:1;
12081420 
12091421 	int num_regs;
12101422 
....@@ -1224,12 +1436,23 @@
12241436 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
12251437 			int irq_base, const struct regmap_irq_chip *chip,
12261438 			struct regmap_irq_chip_data **data);
1439
+int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
1440
+			       struct regmap *map, int irq,
1441
+			       int irq_flags, int irq_base,
1442
+			       const struct regmap_irq_chip *chip,
1443
+			       struct regmap_irq_chip_data **data);
12271444 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
12281445 
12291446 int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
12301447 			     int irq_flags, int irq_base,
12311448 			     const struct regmap_irq_chip *chip,
12321449 			     struct regmap_irq_chip_data **data);
1450
+int devm_regmap_add_irq_chip_fwnode(struct device *dev,
1451
+				    struct fwnode_handle *fwnode,
1452
+				    struct regmap *map, int irq,
1453
+				    int irq_flags, int irq_base,
1454
+				    const struct regmap_irq_chip *chip,
1455
+				    struct regmap_irq_chip_data **data);
12331456 void devm_regmap_del_irq_chip(struct device *dev, int irq,
12341457 			      struct regmap_irq_chip_data *data);
12351458 
....@@ -1269,6 +1492,13 @@
12691492 
12701493 static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
12711494 					 const void *val, size_t val_len)
1495
+{
1496
+	WARN_ONCE(1, "regmap API is disabled");
1497
+	return -EINVAL;
1498
+}
1499
+
1500
+static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
1501
+				    const void *val, size_t val_len)
12721502 {
12731503 	WARN_ONCE(1, "regmap API is disabled");
12741504 	return -EINVAL;
....@@ -1317,6 +1547,27 @@
13171547 	return -EINVAL;
13181548 }
13191549 
1550
+static inline int regmap_set_bits(struct regmap *map,
1551
+				  unsigned int reg, unsigned int bits)
1552
+{
1553
+	WARN_ONCE(1, "regmap API is disabled");
1554
+	return -EINVAL;
1555
+}
1556
+
1557
+static inline int regmap_clear_bits(struct regmap *map,
1558
+				    unsigned int reg, unsigned int bits)
1559
+{
1560
+	WARN_ONCE(1, "regmap API is disabled");
1561
+	return -EINVAL;
1562
+}
1563
+
1564
+static inline int regmap_test_bits(struct regmap *map,
1565
+				   unsigned int reg, unsigned int bits)
1566
+{
1567
+	WARN_ONCE(1, "regmap API is disabled");
1568
+	return -EINVAL;
1569
+}
1570
+
13201571 static inline int regmap_field_update_bits_base(struct regmap_field *field,
13211572 					unsigned int mask, unsigned int val,
13221573 					bool *change, bool async, bool force)
....@@ -1334,6 +1585,103 @@
13341585 	return -EINVAL;
13351586 }
13361587 
1588
+static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1589
+				     unsigned int mask, unsigned int val)
1590
+{
1591
+	WARN_ONCE(1, "regmap API is disabled");
1592
+	return -EINVAL;
1593
+}
1594
+
1595
+static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1596
+					   unsigned int mask, unsigned int val)
1597
+{
1598
+	WARN_ONCE(1, "regmap API is disabled");
1599
+	return -EINVAL;
1600
+}
1601
+
1602
+static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1603
+					   unsigned int mask, unsigned int val,
1604
+					   bool *change)
1605
+{
1606
+	WARN_ONCE(1, "regmap API is disabled");
1607
+	return -EINVAL;
1608
+}
1609
+
1610
+static inline int
1611
+regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1612
+			       unsigned int mask, unsigned int val,
1613
+			       bool *change)
1614
+{
1615
+	WARN_ONCE(1, "regmap API is disabled");
1616
+	return -EINVAL;
1617
+}
1618
+
1619
+static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1620
+				    unsigned int mask, unsigned int val)
1621
+{
1622
+	WARN_ONCE(1, "regmap API is disabled");
1623
+	return -EINVAL;
1624
+}
1625
+
1626
+static inline int regmap_field_write(struct regmap_field *field,
1627
+				     unsigned int val)
1628
+{
1629
+	WARN_ONCE(1, "regmap API is disabled");
1630
+	return -EINVAL;
1631
+}
1632
+
1633
+static inline int regmap_field_force_write(struct regmap_field *field,
1634
+					   unsigned int val)
1635
+{
1636
+	WARN_ONCE(1, "regmap API is disabled");
1637
+	return -EINVAL;
1638
+}
1639
+
1640
+static inline int regmap_field_update_bits(struct regmap_field *field,
1641
+					   unsigned int mask, unsigned int val)
1642
+{
1643
+	WARN_ONCE(1, "regmap API is disabled");
1644
+	return -EINVAL;
1645
+}
1646
+
1647
+static inline int
1648
+regmap_field_force_update_bits(struct regmap_field *field,
1649
+			       unsigned int mask, unsigned int val)
1650
+{
1651
+	WARN_ONCE(1, "regmap API is disabled");
1652
+	return -EINVAL;
1653
+}
1654
+
1655
+static inline int regmap_fields_write(struct regmap_field *field,
1656
+				      unsigned int id, unsigned int val)
1657
+{
1658
+	WARN_ONCE(1, "regmap API is disabled");
1659
+	return -EINVAL;
1660
+}
1661
+
1662
+static inline int regmap_fields_force_write(struct regmap_field *field,
1663
+					    unsigned int id, unsigned int val)
1664
+{
1665
+	WARN_ONCE(1, "regmap API is disabled");
1666
+	return -EINVAL;
1667
+}
1668
+
1669
+static inline int
1670
+regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1671
+			  unsigned int mask, unsigned int val)
1672
+{
1673
+	WARN_ONCE(1, "regmap API is disabled");
1674
+	return -EINVAL;
1675
+}
1676
+
1677
+static inline int
1678
+regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1679
+				unsigned int mask, unsigned int val)
1680
+{
1681
+	WARN_ONCE(1, "regmap API is disabled");
1682
+	return -EINVAL;
1683
+}
1684
+
13371685 static inline int regmap_get_val_bytes(struct regmap *map)
13381686 {
13391687 	WARN_ONCE(1, "regmap API is disabled");