hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/include/linux/qed/eth_common.h
....@@ -1,33 +1,7 @@
1
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
12 /* QLogic qed NIC Driver
23 * Copyright (c) 2015-2017 QLogic Corporation
3
- *
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- * This software is available to you under a choice of one of two
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- * licenses. You may choose to be licensed under the terms of the GNU
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- * General Public License (GPL) Version 2, available from the file
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- * COPYING in the main directory of this source tree, or the
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- * OpenIB.org BSD license below:
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- *
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- * Redistribution and use in source and binary forms, with or
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- * without modification, are permitted provided that the following
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- * conditions are met:
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- *
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- * - Redistributions of source code must retain the above
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- * copyright notice, this list of conditions and the following
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- * disclaimer.
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- *
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- * - Redistributions in binary form must reproduce the above
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- * copyright notice, this list of conditions and the following
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- * disclaimer in the documentation and /or other materials
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- * provided with the distribution.
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- *
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- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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- * SOFTWARE.
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+ * Copyright (c) 2019-2020 Marvell International Ltd.
315 */
326
337 #ifndef __ETH_COMMON__
....@@ -38,9 +12,11 @@
3812 /********************/
3913
4014 #define ETH_HSI_VER_MAJOR 3
41
-#define ETH_HSI_VER_MINOR 10
15
+#define ETH_HSI_VER_MINOR 11
4216
43
-#define ETH_HSI_VER_NO_PKT_LEN_TUNN 5
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+#define ETH_HSI_VER_NO_PKT_LEN_TUNN 5
18
+/* Maximum number of pinned L2 connections (CIDs) */
19
+#define ETH_PINNED_CONN_MAX_NUM 32
4420
4521 #define ETH_CACHE_LINE_SIZE 64
4622 #define ETH_RX_CQE_GAP 32
....@@ -61,6 +37,7 @@
6137 #define ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT 3
6238 #define ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT 2
6339 #define ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE 2
40
+#define ETH_TX_MIN_BDS_PER_PKT_W_VPORT_FORWARDING 4
6441 #define ETH_TX_MAX_NON_LSO_PKT_LEN (9700 - (4 + 4 + 12 + 8))
6542 #define ETH_TX_MAX_LSO_HDR_BYTES 510
6643 #define ETH_TX_LSO_WINDOW_BDS_NUM (18 - 1)
....@@ -75,9 +52,8 @@
7552 #define ETH_NUM_STATISTIC_COUNTERS_QUAD_VF_ZONE \
7653 (ETH_NUM_STATISTIC_COUNTERS - 3 * MAX_NUM_VFS / 4)
7754
78
-/* Maximum number of buffers, used for RX packet placement */
7955 #define ETH_RX_MAX_BUFF_PER_PKT 5
80
-#define ETH_RX_BD_THRESHOLD 12
56
+#define ETH_RX_BD_THRESHOLD 16
8157
8258 /* Num of MAC/VLAN filters */
8359 #define ETH_NUM_MAC_FILTERS 512
....@@ -96,24 +72,24 @@
9672 #define ETH_RSS_ENGINE_NUM_BB 127
9773
9874 /* TPA constants */
99
-#define ETH_TPA_MAX_AGGS_NUM 64
100
-#define ETH_TPA_CQE_START_LEN_LIST_SIZE ETH_RX_MAX_BUFF_PER_PKT
101
-#define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6
102
-#define ETH_TPA_CQE_END_LEN_LIST_SIZE 4
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+#define ETH_TPA_MAX_AGGS_NUM 64
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+#define ETH_TPA_CQE_START_BW_LEN_LIST_SIZE 2
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+#define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6
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+#define ETH_TPA_CQE_END_LEN_LIST_SIZE 4
10379
10480 /* Control frame check constants */
105
-#define ETH_CTL_FRAME_ETH_TYPE_NUM 4
81
+#define ETH_CTL_FRAME_ETH_TYPE_NUM 4
10682
10783 /* GFS constants */
10884 #define ETH_GFT_TRASHCAN_VPORT 0x1FF /* GFT drop flow vport number */
10985
11086 /* Destination port mode */
111
-enum dest_port_mode {
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- DEST_PORT_PHY,
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- DEST_PORT_LOOPBACK,
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- DEST_PORT_PHY_LOOPBACK,
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- DEST_PORT_DROP,
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- MAX_DEST_PORT_MODE
87
+enum dst_port_mode {
88
+ DST_PORT_PHY,
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+ DST_PORT_LOOPBACK,
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+ DST_PORT_PHY_LOOPBACK,
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+ DST_PORT_DROP,
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+ MAX_DST_PORT_MODE
11793 };
11894
11995 /* Ethernet address type */
....@@ -167,8 +143,8 @@
167143 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_SHIFT 0
168144 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_MASK 0x3
169145 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_SHIFT 4
170
-#define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_MASK 0x3
171
-#define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_SHIFT 6
146
+#define ETH_TX_DATA_2ND_BD_DST_PORT_MODE_MASK 0x3
147
+#define ETH_TX_DATA_2ND_BD_DST_PORT_MODE_SHIFT 6
172148 #define ETH_TX_DATA_2ND_BD_START_BD_MASK 0x1
173149 #define ETH_TX_DATA_2ND_BD_START_BD_SHIFT 8
174150 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_MASK 0x3
....@@ -244,8 +220,9 @@
244220 struct eth_tunnel_parsing_flags tunnel_pars_flags;
245221 u8 bd_num;
246222 u8 reserved;
247
- __le16 flow_id;
248
- u8 reserved1[11];
223
+ __le16 reserved2;
224
+ __le32 flow_id_or_resource_id;
225
+ u8 reserved1[7];
249226 struct eth_pmd_flow_flags pmd_flags;
250227 };
251228
....@@ -296,9 +273,10 @@
296273 struct eth_tunnel_parsing_flags tunnel_pars_flags;
297274 u8 tpa_agg_index;
298275 u8 header_len;
299
- __le16 ext_bd_len_list[ETH_TPA_CQE_START_LEN_LIST_SIZE];
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- __le16 flow_id;
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- u8 reserved;
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+ __le16 bw_ext_bd_len_list[ETH_TPA_CQE_START_BW_LEN_LIST_SIZE];
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+ __le16 reserved2;
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+ __le32 flow_id_or_resource_id;
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+ u8 reserved[3];
302280 struct eth_pmd_flow_flags pmd_flags;
303281 };
304282
....@@ -407,6 +385,29 @@
407385 struct eth_tx_data_3rd_bd data;
408386 };
409387
388
+/* The parsing information data for the forth tx bd of a given packet. */
389
+struct eth_tx_data_4th_bd {
390
+ u8 dst_vport_id;
391
+ u8 reserved4;
392
+ __le16 bitfields;
393
+#define ETH_TX_DATA_4TH_BD_DST_VPORT_ID_VALID_MASK 0x1
394
+#define ETH_TX_DATA_4TH_BD_DST_VPORT_ID_VALID_SHIFT 0
395
+#define ETH_TX_DATA_4TH_BD_RESERVED1_MASK 0x7F
396
+#define ETH_TX_DATA_4TH_BD_RESERVED1_SHIFT 1
397
+#define ETH_TX_DATA_4TH_BD_START_BD_MASK 0x1
398
+#define ETH_TX_DATA_4TH_BD_START_BD_SHIFT 8
399
+#define ETH_TX_DATA_4TH_BD_RESERVED2_MASK 0x7F
400
+#define ETH_TX_DATA_4TH_BD_RESERVED2_SHIFT 9
401
+ __le16 reserved3;
402
+};
403
+
404
+/* The forth tx bd of a given packet */
405
+struct eth_tx_4th_bd {
406
+ struct regpair addr; /* Single continuous buffer */
407
+ __le16 nbytes; /* Number of bytes in this BD */
408
+ struct eth_tx_data_4th_bd data; /* Parsing information data */
409
+};
410
+
410411 /* Complementary information for the regular tx bd of a given packet */
411412 struct eth_tx_data_bd {
412413 __le16 reserved0;
....@@ -431,6 +432,7 @@
431432 struct eth_tx_1st_bd first_bd;
432433 struct eth_tx_2nd_bd second_bd;
433434 struct eth_tx_3rd_bd third_bd;
435
+ struct eth_tx_4th_bd fourth_bd;
434436 struct eth_tx_bd reg_bd;
435437 };
436438
....@@ -443,6 +445,12 @@
443445 MAX_ETH_TX_TUNN_TYPE
444446 };
445447
448
+/* Mstorm Queue Zone */
449
+struct mstorm_eth_queue_zone {
450
+ struct eth_rx_prod_data rx_producers;
451
+ __le32 reserved[3];
452
+};
453
+
446454 /* Ystorm Queue Zone */
447455 struct xstorm_eth_queue_zone {
448456 struct coalescing_timeset int_coalescing_timeset;