.. | .. |
---|
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
---|
1 | 2 | /* |
---|
2 | 3 | * Intel Atom SOC Power Management Controller Header File |
---|
3 | 4 | * Copyright (c) 2014, Intel Corporation. |
---|
4 | | - * |
---|
5 | | - * This program is free software; you can redistribute it and/or modify it |
---|
6 | | - * under the terms and conditions of the GNU General Public License, |
---|
7 | | - * version 2, as published by the Free Software Foundation. |
---|
8 | | - * |
---|
9 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
---|
10 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
---|
11 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
---|
12 | | - * more details. |
---|
13 | | - * |
---|
14 | 5 | */ |
---|
15 | 6 | |
---|
16 | 7 | #ifndef PMC_ATOM_H |
---|
17 | 8 | #define PMC_ATOM_H |
---|
| 9 | + |
---|
| 10 | +#include <linux/bits.h> |
---|
18 | 11 | |
---|
19 | 12 | /* ValleyView Power Control Unit PCI Device ID */ |
---|
20 | 13 | #define PCI_DEVICE_ID_VLV_PMC 0x0F1C |
---|
.. | .. |
---|
148 | 141 | #define ACPI_MMIO_REG_LEN 0x100 |
---|
149 | 142 | |
---|
150 | 143 | #define PM1_CNT 0x4 |
---|
151 | | -#define SLEEP_TYPE_MASK 0xFFFFECFF |
---|
| 144 | +#define SLEEP_TYPE_MASK GENMASK(12, 10) |
---|
152 | 145 | #define SLEEP_TYPE_S5 0x1C00 |
---|
153 | | -#define SLEEP_ENABLE 0x2000 |
---|
| 146 | +#define SLEEP_ENABLE BIT(13) |
---|
154 | 147 | |
---|
155 | 148 | extern int pmc_atom_read(int offset, u32 *value); |
---|
156 | 149 | extern int pmc_atom_write(int offset, u32 value); |
---|