hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/include/linux/pci-ecam.h
....@@ -29,7 +29,7 @@
2929 struct resource res;
3030 struct resource busr;
3131 void *priv;
32
- struct pci_ecam_ops *ops;
32
+ const struct pci_ecam_ops *ops;
3333 union {
3434 void __iomem *win; /* 64-bit single mapping */
3535 void __iomem **winp; /* 32-bit per-bus mapping */
....@@ -40,28 +40,30 @@
4040 /* create and free pci_config_window */
4141 struct pci_config_window *pci_ecam_create(struct device *dev,
4242 struct resource *cfgres, struct resource *busr,
43
- struct pci_ecam_ops *ops);
43
+ const struct pci_ecam_ops *ops);
4444 void pci_ecam_free(struct pci_config_window *cfg);
4545
4646 /* map_bus when ->sysdata is an instance of pci_config_window */
4747 void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
4848 int where);
4949 /* default ECAM ops */
50
-extern struct pci_ecam_ops pci_generic_ecam_ops;
50
+extern const struct pci_ecam_ops pci_generic_ecam_ops;
5151
5252 #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
53
-extern struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */
54
-extern struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */
55
-extern struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */
56
-extern struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */
57
-extern struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */
58
-extern struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */
53
+extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */
54
+extern const struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */
55
+extern const struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */
56
+extern const struct pci_ecam_ops rk_pcie_ecam_ops; /* Rockchip */
57
+extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */
58
+extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */
59
+extern const struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */
60
+extern const struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */
61
+extern const struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */
5962 #endif
6063
61
-#ifdef CONFIG_PCI_HOST_COMMON
64
+#if IS_ENABLED(CONFIG_PCI_HOST_COMMON)
6265 /* for DT-based PCI controllers that support ECAM */
63
-int pci_host_common_probe(struct platform_device *pdev,
64
- struct pci_ecam_ops *ops);
66
+int pci_host_common_probe(struct platform_device *pdev);
6567 int pci_host_common_remove(struct platform_device *pdev);
6668 #endif
6769 #endif