.. | .. |
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10 | 10 | #include <linux/init.h> |
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11 | 11 | #include <linux/ioport.h> |
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12 | 12 | #include <linux/ata.h> |
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13 | | -#include <linux/blkdev.h> |
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| 13 | +#include <linux/blk-mq.h> |
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14 | 14 | #include <linux/proc_fs.h> |
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15 | 15 | #include <linux/interrupt.h> |
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16 | 16 | #include <linux/bitops.h> |
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.. | .. |
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50 | 50 | struct scsi_request sreq; |
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51 | 51 | u8 sense[SCSI_SENSE_BUFFERSIZE]; |
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52 | 52 | u8 type; |
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| 53 | + void *special; |
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53 | 54 | }; |
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54 | 55 | |
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55 | 56 | static inline struct ide_request *ide_req(struct request *rq) |
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.. | .. |
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252 | 253 | * Special Driver Flags |
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253 | 254 | */ |
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254 | 255 | enum { |
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255 | | - IDE_SFLAG_SET_GEOMETRY = (1 << 0), |
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256 | | - IDE_SFLAG_RECALIBRATE = (1 << 1), |
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257 | | - IDE_SFLAG_SET_MULTMODE = (1 << 2), |
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| 256 | + IDE_SFLAG_SET_GEOMETRY = BIT(0), |
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| 257 | + IDE_SFLAG_RECALIBRATE = BIT(1), |
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| 258 | + IDE_SFLAG_SET_MULTMODE = BIT(2), |
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258 | 259 | }; |
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259 | 260 | |
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260 | 261 | /* |
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.. | .. |
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266 | 267 | } ide_startstop_t; |
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267 | 268 | |
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268 | 269 | enum { |
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269 | | - IDE_VALID_ERROR = (1 << 1), |
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| 270 | + IDE_VALID_ERROR = BIT(1), |
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270 | 271 | IDE_VALID_FEATURE = IDE_VALID_ERROR, |
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271 | | - IDE_VALID_NSECT = (1 << 2), |
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272 | | - IDE_VALID_LBAL = (1 << 3), |
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273 | | - IDE_VALID_LBAM = (1 << 4), |
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274 | | - IDE_VALID_LBAH = (1 << 5), |
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275 | | - IDE_VALID_DEVICE = (1 << 6), |
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| 272 | + IDE_VALID_NSECT = BIT(2), |
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| 273 | + IDE_VALID_LBAL = BIT(3), |
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| 274 | + IDE_VALID_LBAM = BIT(4), |
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| 275 | + IDE_VALID_LBAH = BIT(5), |
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| 276 | + IDE_VALID_DEVICE = BIT(6), |
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276 | 277 | IDE_VALID_LBA = IDE_VALID_LBAL | |
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277 | 278 | IDE_VALID_LBAM | |
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278 | 279 | IDE_VALID_LBAH, |
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.. | .. |
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288 | 289 | }; |
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289 | 290 | |
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290 | 291 | enum { |
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291 | | - IDE_TFLAG_LBA48 = (1 << 0), |
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292 | | - IDE_TFLAG_WRITE = (1 << 1), |
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293 | | - IDE_TFLAG_CUSTOM_HANDLER = (1 << 2), |
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294 | | - IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 3), |
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| 292 | + IDE_TFLAG_LBA48 = BIT(0), |
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| 293 | + IDE_TFLAG_WRITE = BIT(1), |
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| 294 | + IDE_TFLAG_CUSTOM_HANDLER = BIT(2), |
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| 295 | + IDE_TFLAG_DMA_PIO_FALLBACK = BIT(3), |
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295 | 296 | /* force 16-bit I/O operations */ |
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296 | | - IDE_TFLAG_IO_16BIT = (1 << 4), |
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| 297 | + IDE_TFLAG_IO_16BIT = BIT(4), |
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297 | 298 | /* struct ide_cmd was allocated using kmalloc() */ |
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298 | | - IDE_TFLAG_DYN = (1 << 5), |
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299 | | - IDE_TFLAG_FS = (1 << 6), |
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300 | | - IDE_TFLAG_MULTI_PIO = (1 << 7), |
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301 | | - IDE_TFLAG_SET_XFER = (1 << 8), |
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| 299 | + IDE_TFLAG_DYN = BIT(5), |
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| 300 | + IDE_TFLAG_FS = BIT(6), |
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| 301 | + IDE_TFLAG_MULTI_PIO = BIT(7), |
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| 302 | + IDE_TFLAG_SET_XFER = BIT(8), |
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302 | 303 | }; |
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303 | 304 | |
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304 | 305 | enum { |
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305 | | - IDE_FTFLAG_FLAGGED = (1 << 0), |
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306 | | - IDE_FTFLAG_SET_IN_FLAGS = (1 << 1), |
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307 | | - IDE_FTFLAG_OUT_DATA = (1 << 2), |
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308 | | - IDE_FTFLAG_IN_DATA = (1 << 3), |
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| 306 | + IDE_FTFLAG_FLAGGED = BIT(0), |
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| 307 | + IDE_FTFLAG_SET_IN_FLAGS = BIT(1), |
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| 308 | + IDE_FTFLAG_OUT_DATA = BIT(2), |
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| 309 | + IDE_FTFLAG_IN_DATA = BIT(3), |
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309 | 310 | }; |
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310 | 311 | |
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311 | 312 | struct ide_taskfile { |
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.. | .. |
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356 | 357 | /* ATAPI packet command flags */ |
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357 | 358 | enum { |
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358 | 359 | /* set when an error is considered normal - no retry (ide-tape) */ |
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359 | | - PC_FLAG_ABORT = (1 << 0), |
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360 | | - PC_FLAG_SUPPRESS_ERROR = (1 << 1), |
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361 | | - PC_FLAG_WAIT_FOR_DSC = (1 << 2), |
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362 | | - PC_FLAG_DMA_OK = (1 << 3), |
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363 | | - PC_FLAG_DMA_IN_PROGRESS = (1 << 4), |
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364 | | - PC_FLAG_DMA_ERROR = (1 << 5), |
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365 | | - PC_FLAG_WRITING = (1 << 6), |
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| 360 | + PC_FLAG_ABORT = BIT(0), |
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| 361 | + PC_FLAG_SUPPRESS_ERROR = BIT(1), |
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| 362 | + PC_FLAG_WAIT_FOR_DSC = BIT(2), |
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| 363 | + PC_FLAG_DMA_OK = BIT(3), |
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| 364 | + PC_FLAG_DMA_IN_PROGRESS = BIT(4), |
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| 365 | + PC_FLAG_DMA_ERROR = BIT(5), |
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| 366 | + PC_FLAG_WRITING = BIT(6), |
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366 | 367 | }; |
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367 | 368 | |
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368 | 369 | #define ATAPI_WAIT_PC (60 * HZ) |
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.. | .. |
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412 | 413 | sector_t); |
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413 | 414 | int (*ioctl)(struct ide_drive_s *, struct block_device *, |
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414 | 415 | fmode_t, unsigned int, unsigned long); |
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| 416 | + int (*compat_ioctl)(struct ide_drive_s *, struct block_device *, |
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| 417 | + fmode_t, unsigned int, unsigned long); |
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415 | 418 | }; |
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416 | 419 | |
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417 | 420 | /* ATAPI device flags */ |
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418 | 421 | enum { |
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419 | | - IDE_AFLAG_DRQ_INTERRUPT = (1 << 0), |
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| 422 | + IDE_AFLAG_DRQ_INTERRUPT = BIT(0), |
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420 | 423 | |
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421 | 424 | /* ide-cd */ |
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422 | 425 | /* Drive cannot eject the disc. */ |
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423 | | - IDE_AFLAG_NO_EJECT = (1 << 1), |
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| 426 | + IDE_AFLAG_NO_EJECT = BIT(1), |
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424 | 427 | /* Drive is a pre ATAPI 1.2 drive. */ |
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425 | | - IDE_AFLAG_PRE_ATAPI12 = (1 << 2), |
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| 428 | + IDE_AFLAG_PRE_ATAPI12 = BIT(2), |
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426 | 429 | /* TOC addresses are in BCD. */ |
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427 | | - IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3), |
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| 430 | + IDE_AFLAG_TOCADDR_AS_BCD = BIT(3), |
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428 | 431 | /* TOC track numbers are in BCD. */ |
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429 | | - IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4), |
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| 432 | + IDE_AFLAG_TOCTRACKS_AS_BCD = BIT(4), |
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430 | 433 | /* Saved TOC information is current. */ |
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431 | | - IDE_AFLAG_TOC_VALID = (1 << 6), |
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| 434 | + IDE_AFLAG_TOC_VALID = BIT(6), |
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432 | 435 | /* We think that the drive door is locked. */ |
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433 | | - IDE_AFLAG_DOOR_LOCKED = (1 << 7), |
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| 436 | + IDE_AFLAG_DOOR_LOCKED = BIT(7), |
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434 | 437 | /* SET_CD_SPEED command is unsupported. */ |
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435 | | - IDE_AFLAG_NO_SPEED_SELECT = (1 << 8), |
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436 | | - IDE_AFLAG_VERTOS_300_SSD = (1 << 9), |
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437 | | - IDE_AFLAG_VERTOS_600_ESD = (1 << 10), |
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438 | | - IDE_AFLAG_SANYO_3CD = (1 << 11), |
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439 | | - IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12), |
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440 | | - IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13), |
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441 | | - IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14), |
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| 438 | + IDE_AFLAG_NO_SPEED_SELECT = BIT(8), |
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| 439 | + IDE_AFLAG_VERTOS_300_SSD = BIT(9), |
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| 440 | + IDE_AFLAG_VERTOS_600_ESD = BIT(10), |
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| 441 | + IDE_AFLAG_SANYO_3CD = BIT(11), |
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| 442 | + IDE_AFLAG_FULL_CAPS_PAGE = BIT(12), |
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| 443 | + IDE_AFLAG_PLAY_AUDIO_OK = BIT(13), |
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| 444 | + IDE_AFLAG_LE_SPEED_FIELDS = BIT(14), |
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442 | 445 | |
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443 | 446 | /* ide-floppy */ |
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444 | 447 | /* Avoid commands not supported in Clik drive */ |
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445 | | - IDE_AFLAG_CLIK_DRIVE = (1 << 15), |
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| 448 | + IDE_AFLAG_CLIK_DRIVE = BIT(15), |
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446 | 449 | /* Requires BH algorithm for packets */ |
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447 | | - IDE_AFLAG_ZIP_DRIVE = (1 << 16), |
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| 450 | + IDE_AFLAG_ZIP_DRIVE = BIT(16), |
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448 | 451 | /* Supports format progress report */ |
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449 | | - IDE_AFLAG_SRFP = (1 << 17), |
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| 452 | + IDE_AFLAG_SRFP = BIT(17), |
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450 | 453 | |
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451 | 454 | /* ide-tape */ |
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452 | | - IDE_AFLAG_IGNORE_DSC = (1 << 18), |
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| 455 | + IDE_AFLAG_IGNORE_DSC = BIT(18), |
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453 | 456 | /* 0 When the tape position is unknown */ |
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454 | | - IDE_AFLAG_ADDRESS_VALID = (1 << 19), |
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| 457 | + IDE_AFLAG_ADDRESS_VALID = BIT(19), |
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455 | 458 | /* Device already opened */ |
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456 | | - IDE_AFLAG_BUSY = (1 << 20), |
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| 459 | + IDE_AFLAG_BUSY = BIT(20), |
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457 | 460 | /* Attempt to auto-detect the current user block size */ |
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458 | | - IDE_AFLAG_DETECT_BS = (1 << 21), |
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| 461 | + IDE_AFLAG_DETECT_BS = BIT(21), |
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459 | 462 | /* Currently on a filemark */ |
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460 | | - IDE_AFLAG_FILEMARK = (1 << 22), |
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| 463 | + IDE_AFLAG_FILEMARK = BIT(22), |
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461 | 464 | /* 0 = no tape is loaded, so we don't rewind after ejecting */ |
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462 | | - IDE_AFLAG_MEDIUM_PRESENT = (1 << 23), |
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| 465 | + IDE_AFLAG_MEDIUM_PRESENT = BIT(23), |
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463 | 466 | |
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464 | | - IDE_AFLAG_NO_AUTOCLOSE = (1 << 24), |
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| 467 | + IDE_AFLAG_NO_AUTOCLOSE = BIT(24), |
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465 | 468 | }; |
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466 | 469 | |
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467 | 470 | /* device flags */ |
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468 | 471 | enum { |
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469 | 472 | /* restore settings after device reset */ |
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470 | | - IDE_DFLAG_KEEP_SETTINGS = (1 << 0), |
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| 473 | + IDE_DFLAG_KEEP_SETTINGS = BIT(0), |
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471 | 474 | /* device is using DMA for read/write */ |
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472 | | - IDE_DFLAG_USING_DMA = (1 << 1), |
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| 475 | + IDE_DFLAG_USING_DMA = BIT(1), |
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473 | 476 | /* okay to unmask other IRQs */ |
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474 | | - IDE_DFLAG_UNMASK = (1 << 2), |
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| 477 | + IDE_DFLAG_UNMASK = BIT(2), |
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475 | 478 | /* don't attempt flushes */ |
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476 | | - IDE_DFLAG_NOFLUSH = (1 << 3), |
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| 479 | + IDE_DFLAG_NOFLUSH = BIT(3), |
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477 | 480 | /* DSC overlap */ |
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478 | | - IDE_DFLAG_DSC_OVERLAP = (1 << 4), |
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| 481 | + IDE_DFLAG_DSC_OVERLAP = BIT(4), |
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479 | 482 | /* give potential excess bandwidth */ |
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480 | | - IDE_DFLAG_NICE1 = (1 << 5), |
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| 483 | + IDE_DFLAG_NICE1 = BIT(5), |
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481 | 484 | /* device is physically present */ |
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482 | | - IDE_DFLAG_PRESENT = (1 << 6), |
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| 485 | + IDE_DFLAG_PRESENT = BIT(6), |
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483 | 486 | /* disable Host Protected Area */ |
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484 | | - IDE_DFLAG_NOHPA = (1 << 7), |
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| 487 | + IDE_DFLAG_NOHPA = BIT(7), |
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485 | 488 | /* id read from device (synthetic if not set) */ |
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486 | | - IDE_DFLAG_ID_READ = (1 << 8), |
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487 | | - IDE_DFLAG_NOPROBE = (1 << 9), |
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| 489 | + IDE_DFLAG_ID_READ = BIT(8), |
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| 490 | + IDE_DFLAG_NOPROBE = BIT(9), |
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488 | 491 | /* need to do check_media_change() */ |
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489 | | - IDE_DFLAG_REMOVABLE = (1 << 10), |
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490 | | - /* needed for removable devices */ |
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491 | | - IDE_DFLAG_ATTACH = (1 << 11), |
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492 | | - IDE_DFLAG_FORCED_GEOM = (1 << 12), |
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| 492 | + IDE_DFLAG_REMOVABLE = BIT(10), |
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| 493 | + IDE_DFLAG_FORCED_GEOM = BIT(12), |
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493 | 494 | /* disallow setting unmask bit */ |
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494 | | - IDE_DFLAG_NO_UNMASK = (1 << 13), |
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| 495 | + IDE_DFLAG_NO_UNMASK = BIT(13), |
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495 | 496 | /* disallow enabling 32-bit I/O */ |
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496 | | - IDE_DFLAG_NO_IO_32BIT = (1 << 14), |
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| 497 | + IDE_DFLAG_NO_IO_32BIT = BIT(14), |
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497 | 498 | /* for removable only: door lock/unlock works */ |
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498 | | - IDE_DFLAG_DOORLOCKING = (1 << 15), |
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| 499 | + IDE_DFLAG_DOORLOCKING = BIT(15), |
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499 | 500 | /* disallow DMA */ |
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500 | | - IDE_DFLAG_NODMA = (1 << 16), |
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| 501 | + IDE_DFLAG_NODMA = BIT(16), |
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501 | 502 | /* powermanagement told us not to do anything, so sleep nicely */ |
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502 | | - IDE_DFLAG_BLOCKED = (1 << 17), |
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| 503 | + IDE_DFLAG_BLOCKED = BIT(17), |
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503 | 504 | /* sleeping & sleep field valid */ |
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504 | | - IDE_DFLAG_SLEEPING = (1 << 18), |
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505 | | - IDE_DFLAG_POST_RESET = (1 << 19), |
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506 | | - IDE_DFLAG_UDMA33_WARNED = (1 << 20), |
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507 | | - IDE_DFLAG_LBA48 = (1 << 21), |
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| 505 | + IDE_DFLAG_SLEEPING = BIT(18), |
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| 506 | + IDE_DFLAG_POST_RESET = BIT(19), |
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| 507 | + IDE_DFLAG_UDMA33_WARNED = BIT(20), |
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| 508 | + IDE_DFLAG_LBA48 = BIT(21), |
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508 | 509 | /* status of write cache */ |
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509 | | - IDE_DFLAG_WCACHE = (1 << 22), |
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| 510 | + IDE_DFLAG_WCACHE = BIT(22), |
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510 | 511 | /* used for ignoring ATA_DF */ |
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511 | | - IDE_DFLAG_NOWERR = (1 << 23), |
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| 512 | + IDE_DFLAG_NOWERR = BIT(23), |
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512 | 513 | /* retrying in PIO */ |
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513 | | - IDE_DFLAG_DMA_PIO_RETRY = (1 << 24), |
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514 | | - IDE_DFLAG_LBA = (1 << 25), |
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| 514 | + IDE_DFLAG_DMA_PIO_RETRY = BIT(24), |
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| 515 | + IDE_DFLAG_LBA = BIT(25), |
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515 | 516 | /* don't unload heads */ |
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516 | | - IDE_DFLAG_NO_UNLOAD = (1 << 26), |
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| 517 | + IDE_DFLAG_NO_UNLOAD = BIT(26), |
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517 | 518 | /* heads unloaded, please don't reset port */ |
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518 | | - IDE_DFLAG_PARKED = (1 << 27), |
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519 | | - IDE_DFLAG_MEDIA_CHANGED = (1 << 28), |
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| 519 | + IDE_DFLAG_PARKED = BIT(27), |
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| 520 | + IDE_DFLAG_MEDIA_CHANGED = BIT(28), |
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520 | 521 | /* write protect */ |
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521 | | - IDE_DFLAG_WP = (1 << 29), |
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522 | | - IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30), |
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523 | | - IDE_DFLAG_NIEN_QUIRK = (1 << 31), |
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| 522 | + IDE_DFLAG_WP = BIT(29), |
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| 523 | + IDE_DFLAG_FORMAT_IN_PROGRESS = BIT(30), |
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| 524 | + IDE_DFLAG_NIEN_QUIRK = BIT(31), |
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524 | 525 | }; |
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525 | 526 | |
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526 | 527 | struct ide_drive_s { |
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.. | .. |
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528 | 529 | char driver_req[10]; /* requests specific driver */ |
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529 | 530 | |
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530 | 531 | struct request_queue *queue; /* request queue */ |
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| 532 | + |
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| 533 | + bool (*prep_rq)(struct ide_drive_s *, struct request *); |
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| 534 | + |
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| 535 | + struct blk_mq_tag_set tag_set; |
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531 | 536 | |
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532 | 537 | struct request *rq; /* current request */ |
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533 | 538 | void *driver_data; /* extra driver data */ |
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.. | .. |
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610 | 615 | |
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611 | 616 | /* current sense rq and buffer */ |
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612 | 617 | bool sense_rq_armed; |
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| 618 | + bool sense_rq_active; |
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613 | 619 | struct request *sense_rq; |
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614 | 620 | struct request_sense sense_data; |
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| 621 | + |
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| 622 | + /* async sense insertion */ |
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| 623 | + struct work_struct rq_work; |
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| 624 | + struct list_head rq_list; |
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615 | 625 | }; |
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616 | 626 | |
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617 | 627 | typedef struct ide_drive_s ide_drive_t; |
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.. | .. |
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699 | 709 | }; |
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700 | 710 | |
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701 | 711 | enum { |
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702 | | - IDE_PFLAG_PROBING = (1 << 0), |
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| 712 | + IDE_PFLAG_PROBING = BIT(0), |
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703 | 713 | }; |
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704 | 714 | |
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705 | 715 | struct ide_host; |
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.. | .. |
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852 | 862 | * configurable drive settings |
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853 | 863 | */ |
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854 | 864 | |
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855 | | -#define DS_SYNC (1 << 0) |
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| 865 | +#define DS_SYNC BIT(0) |
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856 | 866 | |
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857 | 867 | struct ide_devset { |
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858 | 868 | int (*get)(ide_drive_t *); |
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.. | .. |
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933 | 943 | ide_devset_set(_name, _field); \ |
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934 | 944 | IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) |
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935 | 945 | |
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| 946 | +#define ide_devset_ro_field(_name, _field) \ |
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| 947 | +ide_devset_get(_name, _field); \ |
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| 948 | +IDE_DEVSET(_name, 0, get_##_name, NULL) |
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| 949 | + |
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936 | 950 | #define ide_devset_rw_flag(_name, _field) \ |
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937 | 951 | ide_devset_get_flag(_name, _field); \ |
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938 | 952 | ide_devset_set_flag(_name, _field); \ |
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.. | .. |
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990 | 1004 | |
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991 | 1005 | enum { |
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992 | 1006 | /* enter/exit functions */ |
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993 | | - IDE_DBG_FUNC = (1 << 0), |
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| 1007 | + IDE_DBG_FUNC = BIT(0), |
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994 | 1008 | /* sense key/asc handling */ |
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995 | | - IDE_DBG_SENSE = (1 << 1), |
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| 1009 | + IDE_DBG_SENSE = BIT(1), |
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996 | 1010 | /* packet commands handling */ |
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997 | | - IDE_DBG_PC = (1 << 2), |
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| 1011 | + IDE_DBG_PC = BIT(2), |
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998 | 1012 | /* request handling */ |
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999 | | - IDE_DBG_RQ = (1 << 3), |
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| 1013 | + IDE_DBG_RQ = BIT(3), |
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1000 | 1014 | /* driver probing/setup */ |
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1001 | | - IDE_DBG_PROBE = (1 << 4), |
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| 1015 | + IDE_DBG_PROBE = BIT(4), |
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1002 | 1016 | }; |
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1003 | 1017 | |
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1004 | 1018 | /* DRV_NAME has to be defined in the driver before using the macro below */ |
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.. | .. |
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1089 | 1103 | |
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1090 | 1104 | int ide_end_rq(ide_drive_t *, struct request *, blk_status_t, unsigned int); |
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1091 | 1105 | void ide_kill_rq(ide_drive_t *, struct request *); |
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| 1106 | +void ide_insert_request_head(ide_drive_t *, struct request *); |
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1092 | 1107 | |
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1093 | 1108 | void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int); |
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1094 | 1109 | void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int); |
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.. | .. |
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1160 | 1175 | * the tail of our block device request queue and wait for their completion. |
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1161 | 1176 | */ |
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1162 | 1177 | enum { |
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1163 | | - REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */ |
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1164 | | - REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */ |
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1165 | | - REQ_IDETAPE_READ = (1 << 2), |
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1166 | | - REQ_IDETAPE_WRITE = (1 << 3), |
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| 1178 | + REQ_IDETAPE_PC1 = BIT(0), /* packet command (first stage) */ |
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| 1179 | + REQ_IDETAPE_PC2 = BIT(1), /* packet command (second stage) */ |
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| 1180 | + REQ_IDETAPE_READ = BIT(2), |
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| 1181 | + REQ_IDETAPE_WRITE = BIT(3), |
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1167 | 1182 | }; |
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1168 | 1183 | |
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1169 | 1184 | int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *, |
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.. | .. |
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1208 | 1223 | |
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1209 | 1224 | extern void ide_timer_expiry(struct timer_list *t); |
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1210 | 1225 | extern irqreturn_t ide_intr(int irq, void *dev_id); |
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1211 | | -extern void do_ide_request(struct request_queue *); |
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| 1226 | +extern blk_status_t ide_queue_rq(struct blk_mq_hw_ctx *, const struct blk_mq_queue_data *); |
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| 1227 | +extern blk_status_t ide_issue_rq(ide_drive_t *, struct request *, bool); |
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1212 | 1228 | extern void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq); |
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1213 | 1229 | |
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1214 | 1230 | void ide_init_disk(struct gendisk *, ide_drive_t *); |
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.. | .. |
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1252 | 1268 | |
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1253 | 1269 | enum { |
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1254 | 1270 | /* Uses ISA control ports not PCI ones. */ |
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1255 | | - IDE_HFLAG_ISA_PORTS = (1 << 0), |
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| 1271 | + IDE_HFLAG_ISA_PORTS = BIT(0), |
---|
1256 | 1272 | /* single port device */ |
---|
1257 | | - IDE_HFLAG_SINGLE = (1 << 1), |
---|
| 1273 | + IDE_HFLAG_SINGLE = BIT(1), |
---|
1258 | 1274 | /* don't use legacy PIO blacklist */ |
---|
1259 | | - IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), |
---|
| 1275 | + IDE_HFLAG_PIO_NO_BLACKLIST = BIT(2), |
---|
1260 | 1276 | /* set for the second port of QD65xx */ |
---|
1261 | | - IDE_HFLAG_QD_2ND_PORT = (1 << 3), |
---|
| 1277 | + IDE_HFLAG_QD_2ND_PORT = BIT(3), |
---|
1262 | 1278 | /* use PIO8/9 for prefetch off/on */ |
---|
1263 | | - IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), |
---|
| 1279 | + IDE_HFLAG_ABUSE_PREFETCH = BIT(4), |
---|
1264 | 1280 | /* use PIO6/7 for fast-devsel off/on */ |
---|
1265 | | - IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), |
---|
| 1281 | + IDE_HFLAG_ABUSE_FAST_DEVSEL = BIT(5), |
---|
1266 | 1282 | /* use 100-102 and 200-202 PIO values to set DMA modes */ |
---|
1267 | | - IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), |
---|
| 1283 | + IDE_HFLAG_ABUSE_DMA_MODES = BIT(6), |
---|
1268 | 1284 | /* |
---|
1269 | 1285 | * keep DMA setting when programming PIO mode, may be used only |
---|
1270 | 1286 | * for hosts which have separate PIO and DMA timings (ie. PMAC) |
---|
1271 | 1287 | */ |
---|
1272 | | - IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), |
---|
| 1288 | + IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = BIT(7), |
---|
1273 | 1289 | /* program host for the transfer mode after programming device */ |
---|
1274 | | - IDE_HFLAG_POST_SET_MODE = (1 << 8), |
---|
| 1290 | + IDE_HFLAG_POST_SET_MODE = BIT(8), |
---|
1275 | 1291 | /* don't program host/device for the transfer mode ("smart" hosts) */ |
---|
1276 | | - IDE_HFLAG_NO_SET_MODE = (1 << 9), |
---|
| 1292 | + IDE_HFLAG_NO_SET_MODE = BIT(9), |
---|
1277 | 1293 | /* trust BIOS for programming chipset/device for DMA */ |
---|
1278 | | - IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), |
---|
| 1294 | + IDE_HFLAG_TRUST_BIOS_FOR_DMA = BIT(10), |
---|
1279 | 1295 | /* host is CS5510/CS5520 */ |
---|
1280 | | - IDE_HFLAG_CS5520 = (1 << 11), |
---|
| 1296 | + IDE_HFLAG_CS5520 = BIT(11), |
---|
1281 | 1297 | /* ATAPI DMA is unsupported */ |
---|
1282 | | - IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), |
---|
| 1298 | + IDE_HFLAG_NO_ATAPI_DMA = BIT(12), |
---|
1283 | 1299 | /* set if host is a "non-bootable" controller */ |
---|
1284 | | - IDE_HFLAG_NON_BOOTABLE = (1 << 13), |
---|
| 1300 | + IDE_HFLAG_NON_BOOTABLE = BIT(13), |
---|
1285 | 1301 | /* host doesn't support DMA */ |
---|
1286 | | - IDE_HFLAG_NO_DMA = (1 << 14), |
---|
| 1302 | + IDE_HFLAG_NO_DMA = BIT(14), |
---|
1287 | 1303 | /* check if host is PCI IDE device before allowing DMA */ |
---|
1288 | | - IDE_HFLAG_NO_AUTODMA = (1 << 15), |
---|
| 1304 | + IDE_HFLAG_NO_AUTODMA = BIT(15), |
---|
1289 | 1305 | /* host uses MMIO */ |
---|
1290 | | - IDE_HFLAG_MMIO = (1 << 16), |
---|
| 1306 | + IDE_HFLAG_MMIO = BIT(16), |
---|
1291 | 1307 | /* no LBA48 */ |
---|
1292 | | - IDE_HFLAG_NO_LBA48 = (1 << 17), |
---|
| 1308 | + IDE_HFLAG_NO_LBA48 = BIT(17), |
---|
1293 | 1309 | /* no LBA48 DMA */ |
---|
1294 | | - IDE_HFLAG_NO_LBA48_DMA = (1 << 18), |
---|
| 1310 | + IDE_HFLAG_NO_LBA48_DMA = BIT(18), |
---|
1295 | 1311 | /* data FIFO is cleared by an error */ |
---|
1296 | | - IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), |
---|
| 1312 | + IDE_HFLAG_ERROR_STOPS_FIFO = BIT(19), |
---|
1297 | 1313 | /* serialize ports */ |
---|
1298 | | - IDE_HFLAG_SERIALIZE = (1 << 20), |
---|
| 1314 | + IDE_HFLAG_SERIALIZE = BIT(20), |
---|
1299 | 1315 | /* host is DTC2278 */ |
---|
1300 | | - IDE_HFLAG_DTC2278 = (1 << 21), |
---|
| 1316 | + IDE_HFLAG_DTC2278 = BIT(21), |
---|
1301 | 1317 | /* 4 devices on a single set of I/O ports */ |
---|
1302 | | - IDE_HFLAG_4DRIVES = (1 << 22), |
---|
| 1318 | + IDE_HFLAG_4DRIVES = BIT(22), |
---|
1303 | 1319 | /* host is TRM290 */ |
---|
1304 | | - IDE_HFLAG_TRM290 = (1 << 23), |
---|
| 1320 | + IDE_HFLAG_TRM290 = BIT(23), |
---|
1305 | 1321 | /* use 32-bit I/O ops */ |
---|
1306 | | - IDE_HFLAG_IO_32BIT = (1 << 24), |
---|
| 1322 | + IDE_HFLAG_IO_32BIT = BIT(24), |
---|
1307 | 1323 | /* unmask IRQs */ |
---|
1308 | | - IDE_HFLAG_UNMASK_IRQS = (1 << 25), |
---|
1309 | | - IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26), |
---|
| 1324 | + IDE_HFLAG_UNMASK_IRQS = BIT(25), |
---|
| 1325 | + IDE_HFLAG_BROKEN_ALTSTATUS = BIT(26), |
---|
1310 | 1326 | /* serialize ports if DMA is possible (for sl82c105) */ |
---|
1311 | | - IDE_HFLAG_SERIALIZE_DMA = (1 << 27), |
---|
| 1327 | + IDE_HFLAG_SERIALIZE_DMA = BIT(27), |
---|
1312 | 1328 | /* force host out of "simplex" mode */ |
---|
1313 | | - IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28), |
---|
| 1329 | + IDE_HFLAG_CLEAR_SIMPLEX = BIT(28), |
---|
1314 | 1330 | /* DSC overlap is unsupported */ |
---|
1315 | | - IDE_HFLAG_NO_DSC = (1 << 29), |
---|
| 1331 | + IDE_HFLAG_NO_DSC = BIT(29), |
---|
1316 | 1332 | /* never use 32-bit I/O ops */ |
---|
1317 | | - IDE_HFLAG_NO_IO_32BIT = (1 << 30), |
---|
| 1333 | + IDE_HFLAG_NO_IO_32BIT = BIT(30), |
---|
1318 | 1334 | /* never unmask IRQs */ |
---|
1319 | | - IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31), |
---|
| 1335 | + IDE_HFLAG_NO_UNMASK_IRQS = BIT(31), |
---|
1320 | 1336 | }; |
---|
1321 | 1337 | |
---|
1322 | 1338 | #ifdef CONFIG_BLK_DEV_OFFBOARD |
---|
.. | .. |
---|
1524 | 1540 | }; |
---|
1525 | 1541 | |
---|
1526 | 1542 | enum { |
---|
1527 | | - IDE_TIMING_SETUP = (1 << 0), |
---|
1528 | | - IDE_TIMING_ACT8B = (1 << 1), |
---|
1529 | | - IDE_TIMING_REC8B = (1 << 2), |
---|
1530 | | - IDE_TIMING_CYC8B = (1 << 3), |
---|
| 1543 | + IDE_TIMING_SETUP = BIT(0), |
---|
| 1544 | + IDE_TIMING_ACT8B = BIT(1), |
---|
| 1545 | + IDE_TIMING_REC8B = BIT(2), |
---|
| 1546 | + IDE_TIMING_CYC8B = BIT(3), |
---|
1531 | 1547 | IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B | |
---|
1532 | 1548 | IDE_TIMING_CYC8B, |
---|
1533 | | - IDE_TIMING_ACTIVE = (1 << 4), |
---|
1534 | | - IDE_TIMING_RECOVER = (1 << 5), |
---|
1535 | | - IDE_TIMING_CYCLE = (1 << 6), |
---|
1536 | | - IDE_TIMING_UDMA = (1 << 7), |
---|
| 1549 | + IDE_TIMING_ACTIVE = BIT(4), |
---|
| 1550 | + IDE_TIMING_RECOVER = BIT(5), |
---|
| 1551 | + IDE_TIMING_CYCLE = BIT(6), |
---|
| 1552 | + IDE_TIMING_UDMA = BIT(7), |
---|
1537 | 1553 | IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT | |
---|
1538 | 1554 | IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER | |
---|
1539 | 1555 | IDE_TIMING_CYCLE | IDE_TIMING_UDMA, |
---|