.. | .. |
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10 | 10 | #include <linux/lockdep.h> |
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11 | 11 | #include <linux/pinctrl/pinctrl.h> |
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12 | 12 | #include <linux/pinctrl/pinconf-generic.h> |
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| 13 | +#include <linux/android_kabi.h> |
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13 | 14 | |
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14 | 15 | struct gpio_desc; |
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15 | 16 | struct of_phandle_args; |
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.. | .. |
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17 | 18 | struct seq_file; |
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18 | 19 | struct gpio_device; |
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19 | 20 | struct module; |
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| 21 | +enum gpiod_flags; |
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| 22 | +enum gpio_lookup_flags; |
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20 | 23 | |
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21 | | -#ifdef CONFIG_GPIOLIB |
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| 24 | +struct gpio_chip; |
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22 | 25 | |
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23 | | -#ifdef CONFIG_GPIOLIB_IRQCHIP |
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| 26 | +#define GPIO_LINE_DIRECTION_IN 1 |
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| 27 | +#define GPIO_LINE_DIRECTION_OUT 0 |
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| 28 | + |
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24 | 29 | /** |
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25 | 30 | * struct gpio_irq_chip - GPIO interrupt controller |
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26 | 31 | */ |
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.. | .. |
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49 | 54 | |
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50 | 55 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
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51 | 56 | /** |
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| 57 | + * @fwnode: |
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| 58 | + * |
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| 59 | + * Firmware node corresponding to this gpiochip/irqchip, necessary |
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| 60 | + * for hierarchical irqdomain support. |
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| 61 | + */ |
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| 62 | + struct fwnode_handle *fwnode; |
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| 63 | + |
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| 64 | + /** |
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52 | 65 | * @parent_domain: |
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53 | 66 | * |
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| 67 | + * If non-NULL, will be set as the parent of this GPIO interrupt |
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| 68 | + * controller's IRQ domain to establish a hierarchical interrupt |
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| 69 | + * domain. The presence of this will activate the hierarchical |
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| 70 | + * interrupt support. |
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54 | 71 | */ |
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55 | 72 | struct irq_domain *parent_domain; |
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| 73 | + |
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| 74 | + /** |
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| 75 | + * @child_to_parent_hwirq: |
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| 76 | + * |
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| 77 | + * This callback translates a child hardware IRQ offset to a parent |
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| 78 | + * hardware IRQ offset on a hierarchical interrupt chip. The child |
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| 79 | + * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the |
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| 80 | + * ngpio field of struct gpio_chip) and the corresponding parent |
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| 81 | + * hardware IRQ and type (such as IRQ_TYPE_*) shall be returned by |
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| 82 | + * the driver. The driver can calculate this from an offset or using |
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| 83 | + * a lookup table or whatever method is best for this chip. Return |
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| 84 | + * 0 on successful translation in the driver. |
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| 85 | + * |
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| 86 | + * If some ranges of hardware IRQs do not have a corresponding parent |
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| 87 | + * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and |
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| 88 | + * @need_valid_mask to make these GPIO lines unavailable for |
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| 89 | + * translation. |
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| 90 | + */ |
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| 91 | + int (*child_to_parent_hwirq)(struct gpio_chip *gc, |
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| 92 | + unsigned int child_hwirq, |
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| 93 | + unsigned int child_type, |
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| 94 | + unsigned int *parent_hwirq, |
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| 95 | + unsigned int *parent_type); |
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| 96 | + |
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| 97 | + /** |
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| 98 | + * @populate_parent_alloc_arg : |
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| 99 | + * |
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| 100 | + * This optional callback allocates and populates the specific struct |
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| 101 | + * for the parent's IRQ domain. If this is not specified, then |
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| 102 | + * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell |
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| 103 | + * variant named &gpiochip_populate_parent_fwspec_fourcell is also |
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| 104 | + * available. |
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| 105 | + */ |
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| 106 | + void *(*populate_parent_alloc_arg)(struct gpio_chip *gc, |
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| 107 | + unsigned int parent_hwirq, |
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| 108 | + unsigned int parent_type); |
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| 109 | + |
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| 110 | + /** |
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| 111 | + * @child_offset_to_irq: |
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| 112 | + * |
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| 113 | + * This optional callback is used to translate the child's GPIO line |
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| 114 | + * offset on the GPIO chip to an IRQ number for the GPIO to_irq() |
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| 115 | + * callback. If this is not specified, then a default callback will be |
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| 116 | + * provided that returns the line offset. |
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| 117 | + */ |
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| 118 | + unsigned int (*child_offset_to_irq)(struct gpio_chip *gc, |
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| 119 | + unsigned int pin); |
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| 120 | + |
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| 121 | + /** |
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| 122 | + * @child_irq_domain_ops: |
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| 123 | + * |
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| 124 | + * The IRQ domain operations that will be used for this GPIO IRQ |
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| 125 | + * chip. If no operations are provided, then default callbacks will |
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| 126 | + * be populated to setup the IRQ hierarchy. Some drivers need to |
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| 127 | + * supply their own translate function. |
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| 128 | + */ |
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| 129 | + struct irq_domain_ops child_irq_domain_ops; |
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56 | 130 | #endif |
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57 | 131 | |
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58 | 132 | /** |
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.. | .. |
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74 | 148 | /** |
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75 | 149 | * @lock_key: |
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76 | 150 | * |
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77 | | - * Per GPIO IRQ chip lockdep classes. |
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| 151 | + * Per GPIO IRQ chip lockdep class for IRQ lock. |
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78 | 152 | */ |
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79 | 153 | struct lock_class_key *lock_key; |
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| 154 | + |
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| 155 | + /** |
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| 156 | + * @request_key: |
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| 157 | + * |
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| 158 | + * Per GPIO IRQ chip lockdep class for IRQ request. |
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| 159 | + */ |
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80 | 160 | struct lock_class_key *request_key; |
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81 | 161 | |
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82 | 162 | /** |
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.. | .. |
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103 | 183 | unsigned int num_parents; |
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104 | 184 | |
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105 | 185 | /** |
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106 | | - * @parent_irq: |
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107 | | - * |
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108 | | - * For use by gpiochip_set_cascaded_irqchip() |
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109 | | - */ |
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110 | | - unsigned int parent_irq; |
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111 | | - |
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112 | | - /** |
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113 | 186 | * @parents: |
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114 | 187 | * |
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115 | 188 | * A list of interrupt parents of a GPIO chip. This is owned by the |
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.. | .. |
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132 | 205 | bool threaded; |
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133 | 206 | |
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134 | 207 | /** |
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135 | | - * @need_valid_mask: |
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136 | | - * |
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137 | | - * If set core allocates @valid_mask with all bits set to one. |
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| 208 | + * @init_hw: optional routine to initialize hardware before |
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| 209 | + * an IRQ chip will be added. This is quite useful when |
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| 210 | + * a particular driver wants to clear IRQ related registers |
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| 211 | + * in order to avoid undesired events. |
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138 | 212 | */ |
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139 | | - bool need_valid_mask; |
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| 213 | + int (*init_hw)(struct gpio_chip *gc); |
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| 214 | + |
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| 215 | + /** |
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| 216 | + * @init_valid_mask: optional routine to initialize @valid_mask, to be |
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| 217 | + * used if not all GPIO lines are valid interrupts. Sometimes some |
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| 218 | + * lines just cannot fire interrupts, and this routine, when defined, |
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| 219 | + * is passed a bitmap in "valid_mask" and it will have ngpios |
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| 220 | + * bits from 0..(ngpios-1) set to "1" as in valid. The callback can |
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| 221 | + * then directly set some bits to "0" if they cannot be used for |
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| 222 | + * interrupts. |
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| 223 | + */ |
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| 224 | + void (*init_valid_mask)(struct gpio_chip *gc, |
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| 225 | + unsigned long *valid_mask, |
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| 226 | + unsigned int ngpios); |
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140 | 227 | |
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141 | 228 | /** |
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142 | 229 | * @valid_mask: |
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.. | .. |
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153 | 240 | * will allocate and map all IRQs during initialization. |
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154 | 241 | */ |
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155 | 242 | unsigned int first; |
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156 | | -}; |
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157 | 243 | |
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158 | | -static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip) |
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159 | | -{ |
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160 | | - return container_of(chip, struct gpio_irq_chip, chip); |
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161 | | -} |
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162 | | -#endif |
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| 244 | + /** |
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| 245 | + * @irq_enable: |
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| 246 | + * |
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| 247 | + * Store old irq_chip irq_enable callback |
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| 248 | + */ |
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| 249 | + void (*irq_enable)(struct irq_data *data); |
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| 250 | + |
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| 251 | + /** |
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| 252 | + * @irq_disable: |
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| 253 | + * |
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| 254 | + * Store old irq_chip irq_disable callback |
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| 255 | + */ |
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| 256 | + void (*irq_disable)(struct irq_data *data); |
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| 257 | + /** |
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| 258 | + * @irq_unmask: |
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| 259 | + * |
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| 260 | + * Store old irq_chip irq_unmask callback |
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| 261 | + */ |
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| 262 | + void (*irq_unmask)(struct irq_data *data); |
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| 263 | + |
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| 264 | + /** |
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| 265 | + * @irq_mask: |
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| 266 | + * |
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| 267 | + * Store old irq_chip irq_mask callback |
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| 268 | + */ |
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| 269 | + void (*irq_mask)(struct irq_data *data); |
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| 270 | + |
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| 271 | + /** |
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| 272 | + * @initialized: |
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| 273 | + * |
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| 274 | + * Flag to track GPIO chip irq member's initialization. |
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| 275 | + * This flag will make sure GPIO chip irq members are not used |
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| 276 | + * before they are initialized. |
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| 277 | + */ |
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| 278 | + ANDROID_KABI_USE(1, bool initialized); |
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| 279 | + ANDROID_KABI_RESERVE(2); |
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| 280 | +}; |
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163 | 281 | |
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164 | 282 | /** |
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165 | 283 | * struct gpio_chip - abstract a GPIO controller |
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.. | .. |
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173 | 291 | * @free: optional hook for chip-specific deactivation, such as |
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174 | 292 | * disabling module power and clock; may sleep |
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175 | 293 | * @get_direction: returns direction for signal "offset", 0=out, 1=in, |
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176 | | - * (same as GPIOF_DIR_XXX), or negative error |
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| 294 | + * (same as GPIO_LINE_DIRECTION_OUT / GPIO_LINE_DIRECTION_IN), |
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| 295 | + * or negative error. It is recommended to always implement this |
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| 296 | + * function, even on input-only or output-only gpio chips. |
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177 | 297 | * @direction_input: configures signal "offset" as input, or returns error |
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| 298 | + * This can be omitted on input-only or output-only gpio chips. |
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178 | 299 | * @direction_output: configures signal "offset" as output, or returns error |
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| 300 | + * This can be omitted on input-only or output-only gpio chips. |
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179 | 301 | * @get: returns value for signal "offset", 0=low, 1=high, or negative error |
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180 | 302 | * @get_multiple: reads values for multiple signals defined by "mask" and |
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181 | 303 | * stores them in "bits", returns 0 on success or negative error |
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.. | .. |
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188 | 310 | * @dbg_show: optional routine to show contents in debugfs; default code |
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189 | 311 | * will be used when this is omitted, but custom code can show extra |
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190 | 312 | * state (such as pullup/pulldown configuration). |
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| 313 | + * @init_valid_mask: optional routine to initialize @valid_mask, to be used if |
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| 314 | + * not all GPIOs are valid. |
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| 315 | + * @add_pin_ranges: optional routine to initialize pin ranges, to be used when |
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| 316 | + * requires special mapping of the pins that provides GPIO functionality. |
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| 317 | + * It is called after adding GPIO chip and before adding IRQ chip. |
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191 | 318 | * @base: identifies the first GPIO number handled by this chip; |
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192 | 319 | * or, if negative during registration, requests dynamic ID allocation. |
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193 | 320 | * DEPRECATION: providing anything non-negative and nailing the base |
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.. | .. |
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215 | 342 | * @reg_dat: data (in) register for generic GPIO |
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216 | 343 | * @reg_set: output set register (out=high) for generic GPIO |
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217 | 344 | * @reg_clr: output clear register (out=low) for generic GPIO |
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218 | | - * @reg_dir: direction setting register for generic GPIO |
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219 | | - * @bgpio_dir_inverted: indicates that the direction register is inverted |
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220 | | - * (gpiolib private state variable) |
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| 345 | + * @reg_dir_out: direction out setting register for generic GPIO |
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| 346 | + * @reg_dir_in: direction in setting register for generic GPIO |
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| 347 | + * @bgpio_dir_unreadable: indicates that the direction register(s) cannot |
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| 348 | + * be read and we need to rely on out internal state tracking. |
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221 | 349 | * @bgpio_bits: number of register bits used for a generic GPIO i.e. |
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222 | 350 | * <register width> * 8 |
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223 | 351 | * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep |
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.. | .. |
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225 | 353 | * @bgpio_data: shadowed data register for generic GPIO to clear/set bits |
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226 | 354 | * safely. |
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227 | 355 | * @bgpio_dir: shadowed direction register for generic GPIO to clear/set |
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228 | | - * direction safely. |
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| 356 | + * direction safely. A "1" in this word means the line is set as |
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| 357 | + * output. |
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229 | 358 | * |
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230 | 359 | * A gpio_chip can help platforms abstract various sources of GPIOs so |
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231 | 360 | * they can all be accessed through a common programing interface. |
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.. | .. |
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243 | 372 | struct device *parent; |
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244 | 373 | struct module *owner; |
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245 | 374 | |
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246 | | - int (*request)(struct gpio_chip *chip, |
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247 | | - unsigned offset); |
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248 | | - void (*free)(struct gpio_chip *chip, |
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249 | | - unsigned offset); |
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250 | | - int (*get_direction)(struct gpio_chip *chip, |
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251 | | - unsigned offset); |
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252 | | - int (*direction_input)(struct gpio_chip *chip, |
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253 | | - unsigned offset); |
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254 | | - int (*direction_output)(struct gpio_chip *chip, |
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255 | | - unsigned offset, int value); |
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256 | | - int (*get)(struct gpio_chip *chip, |
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257 | | - unsigned offset); |
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258 | | - int (*get_multiple)(struct gpio_chip *chip, |
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| 375 | + int (*request)(struct gpio_chip *gc, |
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| 376 | + unsigned int offset); |
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| 377 | + void (*free)(struct gpio_chip *gc, |
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| 378 | + unsigned int offset); |
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| 379 | + int (*get_direction)(struct gpio_chip *gc, |
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| 380 | + unsigned int offset); |
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| 381 | + int (*direction_input)(struct gpio_chip *gc, |
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| 382 | + unsigned int offset); |
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| 383 | + int (*direction_output)(struct gpio_chip *gc, |
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| 384 | + unsigned int offset, int value); |
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| 385 | + int (*get)(struct gpio_chip *gc, |
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| 386 | + unsigned int offset); |
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| 387 | + int (*get_multiple)(struct gpio_chip *gc, |
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259 | 388 | unsigned long *mask, |
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260 | 389 | unsigned long *bits); |
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261 | | - void (*set)(struct gpio_chip *chip, |
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262 | | - unsigned offset, int value); |
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263 | | - void (*set_multiple)(struct gpio_chip *chip, |
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| 390 | + void (*set)(struct gpio_chip *gc, |
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| 391 | + unsigned int offset, int value); |
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| 392 | + void (*set_multiple)(struct gpio_chip *gc, |
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264 | 393 | unsigned long *mask, |
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265 | 394 | unsigned long *bits); |
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266 | | - int (*set_config)(struct gpio_chip *chip, |
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267 | | - unsigned offset, |
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| 395 | + int (*set_config)(struct gpio_chip *gc, |
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| 396 | + unsigned int offset, |
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268 | 397 | unsigned long config); |
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269 | | - int (*to_irq)(struct gpio_chip *chip, |
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270 | | - unsigned offset); |
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| 398 | + int (*to_irq)(struct gpio_chip *gc, |
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| 399 | + unsigned int offset); |
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271 | 400 | |
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272 | 401 | void (*dbg_show)(struct seq_file *s, |
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273 | | - struct gpio_chip *chip); |
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| 402 | + struct gpio_chip *gc); |
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| 403 | + |
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| 404 | + int (*init_valid_mask)(struct gpio_chip *gc, |
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| 405 | + unsigned long *valid_mask, |
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| 406 | + unsigned int ngpios); |
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| 407 | + |
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| 408 | + int (*add_pin_ranges)(struct gpio_chip *gc); |
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| 409 | + |
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274 | 410 | int base; |
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275 | 411 | u16 ngpio; |
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276 | 412 | const char *const *names; |
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.. | .. |
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283 | 419 | void __iomem *reg_dat; |
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284 | 420 | void __iomem *reg_set; |
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285 | 421 | void __iomem *reg_clr; |
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286 | | - void __iomem *reg_dir; |
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287 | | - bool bgpio_dir_inverted; |
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| 422 | + void __iomem *reg_dir_out; |
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| 423 | + void __iomem *reg_dir_in; |
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| 424 | + bool bgpio_dir_unreadable; |
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288 | 425 | int bgpio_bits; |
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289 | 426 | spinlock_t bgpio_lock; |
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290 | 427 | unsigned long bgpio_data; |
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291 | 428 | unsigned long bgpio_dir; |
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292 | | -#endif |
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| 429 | +#endif /* CONFIG_GPIO_GENERIC */ |
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293 | 430 | |
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294 | 431 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
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295 | 432 | /* |
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.. | .. |
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304 | 441 | * used to handle IRQs for most practical cases. |
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305 | 442 | */ |
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306 | 443 | struct gpio_irq_chip irq; |
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307 | | -#endif |
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308 | | - |
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309 | | - /** |
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310 | | - * @need_valid_mask: |
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311 | | - * |
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312 | | - * If set core allocates @valid_mask with all bits set to one. |
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313 | | - */ |
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314 | | - bool need_valid_mask; |
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| 444 | +#endif /* CONFIG_GPIOLIB_IRQCHIP */ |
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315 | 445 | |
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316 | 446 | /** |
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317 | 447 | * @valid_mask: |
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.. | .. |
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349 | 479 | */ |
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350 | 480 | int (*of_xlate)(struct gpio_chip *gc, |
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351 | 481 | const struct of_phandle_args *gpiospec, u32 *flags); |
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352 | | -#endif |
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| 482 | +#endif /* CONFIG_OF_GPIO */ |
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| 483 | + |
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| 484 | + ANDROID_KABI_RESERVE(1); |
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| 485 | + ANDROID_KABI_RESERVE(2); |
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353 | 486 | }; |
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354 | 487 | |
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355 | | -extern const char *gpiochip_is_requested(struct gpio_chip *chip, |
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356 | | - unsigned offset); |
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| 488 | +extern const char *gpiochip_is_requested(struct gpio_chip *gc, |
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| 489 | + unsigned int offset); |
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| 490 | + |
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| 491 | +/** |
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| 492 | + * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range |
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| 493 | + * @chip: the chip to query |
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| 494 | + * @i: loop variable |
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| 495 | + * @base: first GPIO in the range |
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| 496 | + * @size: amount of GPIOs to check starting from @base |
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| 497 | + * @label: label of current GPIO |
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| 498 | + */ |
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| 499 | +#define for_each_requested_gpio_in_range(chip, i, base, size, label) \ |
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| 500 | + for (i = 0; i < size; i++) \ |
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| 501 | + if ((label = gpiochip_is_requested(chip, base + i)) == NULL) {} else |
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| 502 | + |
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| 503 | +/* Iterates over all requested GPIO of the given @chip */ |
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| 504 | +#define for_each_requested_gpio(chip, i, label) \ |
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| 505 | + for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label) |
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357 | 506 | |
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358 | 507 | /* add/remove chips */ |
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359 | | -extern int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, |
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| 508 | +extern int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, |
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360 | 509 | struct lock_class_key *lock_key, |
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361 | 510 | struct lock_class_key *request_key); |
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362 | 511 | |
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363 | 512 | /** |
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364 | 513 | * gpiochip_add_data() - register a gpio_chip |
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365 | | - * @chip: the chip to register, with chip->base initialized |
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| 514 | + * @gc: the chip to register, with gc->base initialized |
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366 | 515 | * @data: driver-private data associated with this chip |
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367 | 516 | * |
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368 | 517 | * Context: potentially before irqs will work |
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369 | 518 | * |
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370 | 519 | * When gpiochip_add_data() is called very early during boot, so that GPIOs |
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371 | | - * can be freely used, the chip->parent device must be registered before |
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| 520 | + * can be freely used, the gc->parent device must be registered before |
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372 | 521 | * the gpio framework's arch_initcall(). Otherwise sysfs initialization |
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373 | 522 | * for GPIOs will fail rudely. |
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374 | 523 | * |
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375 | 524 | * gpiochip_add_data() must only be called after gpiolib initialization, |
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376 | 525 | * ie after core_initcall(). |
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377 | 526 | * |
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378 | | - * If chip->base is negative, this requests dynamic assignment of |
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| 527 | + * If gc->base is negative, this requests dynamic assignment of |
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379 | 528 | * a range of valid GPIOs. |
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380 | 529 | * |
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381 | 530 | * Returns: |
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382 | 531 | * A negative errno if the chip can't be registered, such as because the |
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383 | | - * chip->base is invalid or already associated with a different chip. |
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| 532 | + * gc->base is invalid or already associated with a different chip. |
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384 | 533 | * Otherwise it returns zero as a success code. |
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385 | 534 | */ |
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386 | 535 | #ifdef CONFIG_LOCKDEP |
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387 | | -#define gpiochip_add_data(chip, data) ({ \ |
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| 536 | +#define gpiochip_add_data(gc, data) ({ \ |
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388 | 537 | static struct lock_class_key lock_key; \ |
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389 | 538 | static struct lock_class_key request_key; \ |
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390 | | - gpiochip_add_data_with_key(chip, data, &lock_key, \ |
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| 539 | + gpiochip_add_data_with_key(gc, data, &lock_key, \ |
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| 540 | + &request_key); \ |
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| 541 | + }) |
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| 542 | +#define devm_gpiochip_add_data(dev, gc, data) ({ \ |
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| 543 | + static struct lock_class_key lock_key; \ |
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| 544 | + static struct lock_class_key request_key; \ |
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| 545 | + devm_gpiochip_add_data_with_key(dev, gc, data, &lock_key, \ |
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391 | 546 | &request_key); \ |
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392 | 547 | }) |
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393 | 548 | #else |
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394 | | -#define gpiochip_add_data(chip, data) gpiochip_add_data_with_key(chip, data, NULL, NULL) |
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395 | | -#endif |
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| 549 | +#define gpiochip_add_data(gc, data) gpiochip_add_data_with_key(gc, data, NULL, NULL) |
---|
| 550 | +#define devm_gpiochip_add_data(dev, gc, data) \ |
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| 551 | + devm_gpiochip_add_data_with_key(dev, gc, data, NULL, NULL) |
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| 552 | +#endif /* CONFIG_LOCKDEP */ |
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396 | 553 | |
---|
397 | | -static inline int gpiochip_add(struct gpio_chip *chip) |
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| 554 | +static inline int gpiochip_add(struct gpio_chip *gc) |
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398 | 555 | { |
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399 | | - return gpiochip_add_data(chip, NULL); |
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| 556 | + return gpiochip_add_data(gc, NULL); |
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400 | 557 | } |
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401 | | -extern void gpiochip_remove(struct gpio_chip *chip); |
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402 | | -extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip, |
---|
403 | | - void *data); |
---|
404 | | -extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip); |
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| 558 | +extern void gpiochip_remove(struct gpio_chip *gc); |
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| 559 | +extern int devm_gpiochip_add_data_with_key(struct device *dev, struct gpio_chip *gc, void *data, |
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| 560 | + struct lock_class_key *lock_key, |
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| 561 | + struct lock_class_key *request_key); |
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405 | 562 | |
---|
406 | 563 | extern struct gpio_chip *gpiochip_find(void *data, |
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407 | | - int (*match)(struct gpio_chip *chip, void *data)); |
---|
| 564 | + int (*match)(struct gpio_chip *gc, void *data)); |
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408 | 565 | |
---|
409 | | -/* lock/unlock as IRQ */ |
---|
410 | | -int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); |
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411 | | -void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); |
---|
412 | | -bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset); |
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| 566 | +bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset); |
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| 567 | +int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset); |
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| 568 | +void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset); |
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| 569 | +void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset); |
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| 570 | +void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset); |
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413 | 571 | |
---|
414 | 572 | /* Line status inquiry for drivers */ |
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415 | | -bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset); |
---|
416 | | -bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset); |
---|
| 573 | +bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset); |
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| 574 | +bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset); |
---|
417 | 575 | |
---|
418 | 576 | /* Sleep persistence inquiry for drivers */ |
---|
419 | | -bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset); |
---|
420 | | -bool gpiochip_line_is_valid(const struct gpio_chip *chip, unsigned int offset); |
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| 577 | +bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset); |
---|
| 578 | +bool gpiochip_line_is_valid(const struct gpio_chip *gc, unsigned int offset); |
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421 | 579 | |
---|
422 | 580 | /* get driver data */ |
---|
423 | | -void *gpiochip_get_data(struct gpio_chip *chip); |
---|
424 | | - |
---|
425 | | -struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); |
---|
| 581 | +void *gpiochip_get_data(struct gpio_chip *gc); |
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426 | 582 | |
---|
427 | 583 | struct bgpio_pdata { |
---|
428 | 584 | const char *label; |
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.. | .. |
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430 | 586 | int ngpio; |
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431 | 587 | }; |
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432 | 588 | |
---|
433 | | -#if IS_ENABLED(CONFIG_GPIO_GENERIC) |
---|
| 589 | +#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
---|
| 590 | + |
---|
| 591 | +void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, |
---|
| 592 | + unsigned int parent_hwirq, |
---|
| 593 | + unsigned int parent_type); |
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| 594 | +void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, |
---|
| 595 | + unsigned int parent_hwirq, |
---|
| 596 | + unsigned int parent_type); |
---|
| 597 | + |
---|
| 598 | +#else |
---|
| 599 | + |
---|
| 600 | +static inline void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, |
---|
| 601 | + unsigned int parent_hwirq, |
---|
| 602 | + unsigned int parent_type) |
---|
| 603 | +{ |
---|
| 604 | + return NULL; |
---|
| 605 | +} |
---|
| 606 | + |
---|
| 607 | +static inline void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, |
---|
| 608 | + unsigned int parent_hwirq, |
---|
| 609 | + unsigned int parent_type) |
---|
| 610 | +{ |
---|
| 611 | + return NULL; |
---|
| 612 | +} |
---|
| 613 | + |
---|
| 614 | +#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
---|
434 | 615 | |
---|
435 | 616 | int bgpio_init(struct gpio_chip *gc, struct device *dev, |
---|
436 | 617 | unsigned long sz, void __iomem *dat, void __iomem *set, |
---|
.. | .. |
---|
443 | 624 | #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) |
---|
444 | 625 | #define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ |
---|
445 | 626 | #define BGPIOF_NO_OUTPUT BIT(5) /* only input */ |
---|
446 | | - |
---|
447 | | -#endif |
---|
448 | | - |
---|
449 | | -#ifdef CONFIG_GPIOLIB_IRQCHIP |
---|
| 627 | +#define BGPIOF_NO_SET_ON_INPUT BIT(6) |
---|
450 | 628 | |
---|
451 | 629 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
---|
452 | 630 | irq_hw_number_t hwirq); |
---|
453 | 631 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq); |
---|
454 | 632 | |
---|
455 | | -void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, |
---|
456 | | - struct irq_chip *irqchip, |
---|
457 | | - unsigned int parent_irq, |
---|
458 | | - irq_flow_handler_t parent_handler); |
---|
| 633 | +int gpiochip_irq_domain_activate(struct irq_domain *domain, |
---|
| 634 | + struct irq_data *data, bool reserve); |
---|
| 635 | +void gpiochip_irq_domain_deactivate(struct irq_domain *domain, |
---|
| 636 | + struct irq_data *data); |
---|
459 | 637 | |
---|
460 | | -void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip, |
---|
| 638 | +void gpiochip_set_nested_irqchip(struct gpio_chip *gc, |
---|
461 | 639 | struct irq_chip *irqchip, |
---|
462 | 640 | unsigned int parent_irq); |
---|
463 | 641 | |
---|
464 | | -int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip, |
---|
| 642 | +int gpiochip_irqchip_add_key(struct gpio_chip *gc, |
---|
465 | 643 | struct irq_chip *irqchip, |
---|
466 | 644 | unsigned int first_irq, |
---|
467 | 645 | irq_flow_handler_t handler, |
---|
.. | .. |
---|
470 | 648 | struct lock_class_key *lock_key, |
---|
471 | 649 | struct lock_class_key *request_key); |
---|
472 | 650 | |
---|
473 | | -bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip, |
---|
| 651 | +bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, |
---|
474 | 652 | unsigned int offset); |
---|
| 653 | + |
---|
| 654 | +#ifdef CONFIG_GPIOLIB_IRQCHIP |
---|
| 655 | +int gpiochip_irqchip_add_domain(struct gpio_chip *gc, |
---|
| 656 | + struct irq_domain *domain); |
---|
| 657 | +#else |
---|
| 658 | +static inline int gpiochip_irqchip_add_domain(struct gpio_chip *gc, |
---|
| 659 | + struct irq_domain *domain) |
---|
| 660 | +{ |
---|
| 661 | + WARN_ON(1); |
---|
| 662 | + return -EINVAL; |
---|
| 663 | +} |
---|
| 664 | +#endif |
---|
475 | 665 | |
---|
476 | 666 | #ifdef CONFIG_LOCKDEP |
---|
477 | 667 | |
---|
.. | .. |
---|
481 | 671 | * boilerplate static inlines provides such a key for each |
---|
482 | 672 | * unique instance. |
---|
483 | 673 | */ |
---|
484 | | -static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip, |
---|
| 674 | +static inline int gpiochip_irqchip_add(struct gpio_chip *gc, |
---|
485 | 675 | struct irq_chip *irqchip, |
---|
486 | 676 | unsigned int first_irq, |
---|
487 | 677 | irq_flow_handler_t handler, |
---|
.. | .. |
---|
490 | 680 | static struct lock_class_key lock_key; |
---|
491 | 681 | static struct lock_class_key request_key; |
---|
492 | 682 | |
---|
493 | | - return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq, |
---|
| 683 | + return gpiochip_irqchip_add_key(gc, irqchip, first_irq, |
---|
494 | 684 | handler, type, false, |
---|
495 | 685 | &lock_key, &request_key); |
---|
496 | 686 | } |
---|
497 | 687 | |
---|
498 | | -static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip, |
---|
| 688 | +static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gc, |
---|
499 | 689 | struct irq_chip *irqchip, |
---|
500 | 690 | unsigned int first_irq, |
---|
501 | 691 | irq_flow_handler_t handler, |
---|
.. | .. |
---|
505 | 695 | static struct lock_class_key lock_key; |
---|
506 | 696 | static struct lock_class_key request_key; |
---|
507 | 697 | |
---|
508 | | - return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq, |
---|
| 698 | + return gpiochip_irqchip_add_key(gc, irqchip, first_irq, |
---|
509 | 699 | handler, type, true, |
---|
510 | 700 | &lock_key, &request_key); |
---|
511 | 701 | } |
---|
512 | | -#else |
---|
513 | | -static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip, |
---|
| 702 | +#else /* ! CONFIG_LOCKDEP */ |
---|
| 703 | +static inline int gpiochip_irqchip_add(struct gpio_chip *gc, |
---|
514 | 704 | struct irq_chip *irqchip, |
---|
515 | 705 | unsigned int first_irq, |
---|
516 | 706 | irq_flow_handler_t handler, |
---|
517 | 707 | unsigned int type) |
---|
518 | 708 | { |
---|
519 | | - return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq, |
---|
| 709 | + return gpiochip_irqchip_add_key(gc, irqchip, first_irq, |
---|
520 | 710 | handler, type, false, NULL, NULL); |
---|
521 | 711 | } |
---|
522 | 712 | |
---|
523 | | -static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip, |
---|
| 713 | +static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gc, |
---|
524 | 714 | struct irq_chip *irqchip, |
---|
525 | 715 | unsigned int first_irq, |
---|
526 | 716 | irq_flow_handler_t handler, |
---|
527 | 717 | unsigned int type) |
---|
528 | 718 | { |
---|
529 | | - return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq, |
---|
| 719 | + return gpiochip_irqchip_add_key(gc, irqchip, first_irq, |
---|
530 | 720 | handler, type, true, NULL, NULL); |
---|
531 | 721 | } |
---|
532 | 722 | #endif /* CONFIG_LOCKDEP */ |
---|
533 | 723 | |
---|
534 | | -#endif /* CONFIG_GPIOLIB_IRQCHIP */ |
---|
535 | | - |
---|
536 | | -int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset); |
---|
537 | | -void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset); |
---|
538 | | -int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset, |
---|
| 724 | +int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset); |
---|
| 725 | +void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset); |
---|
| 726 | +int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset, |
---|
539 | 727 | unsigned long config); |
---|
540 | | - |
---|
541 | | -#ifdef CONFIG_PINCTRL |
---|
542 | 728 | |
---|
543 | 729 | /** |
---|
544 | 730 | * struct gpio_pin_range - pin range controlled by a gpio chip |
---|
.. | .. |
---|
552 | 738 | struct pinctrl_gpio_range range; |
---|
553 | 739 | }; |
---|
554 | 740 | |
---|
555 | | -int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, |
---|
| 741 | +#ifdef CONFIG_PINCTRL |
---|
| 742 | + |
---|
| 743 | +int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, |
---|
556 | 744 | unsigned int gpio_offset, unsigned int pin_offset, |
---|
557 | 745 | unsigned int npins); |
---|
558 | | -int gpiochip_add_pingroup_range(struct gpio_chip *chip, |
---|
| 746 | +int gpiochip_add_pingroup_range(struct gpio_chip *gc, |
---|
559 | 747 | struct pinctrl_dev *pctldev, |
---|
560 | 748 | unsigned int gpio_offset, const char *pin_group); |
---|
561 | | -void gpiochip_remove_pin_ranges(struct gpio_chip *chip); |
---|
| 749 | +void gpiochip_remove_pin_ranges(struct gpio_chip *gc); |
---|
562 | 750 | |
---|
563 | | -#else |
---|
| 751 | +#else /* ! CONFIG_PINCTRL */ |
---|
564 | 752 | |
---|
565 | 753 | static inline int |
---|
566 | | -gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, |
---|
| 754 | +gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, |
---|
567 | 755 | unsigned int gpio_offset, unsigned int pin_offset, |
---|
568 | 756 | unsigned int npins) |
---|
569 | 757 | { |
---|
570 | 758 | return 0; |
---|
571 | 759 | } |
---|
572 | 760 | static inline int |
---|
573 | | -gpiochip_add_pingroup_range(struct gpio_chip *chip, |
---|
| 761 | +gpiochip_add_pingroup_range(struct gpio_chip *gc, |
---|
574 | 762 | struct pinctrl_dev *pctldev, |
---|
575 | 763 | unsigned int gpio_offset, const char *pin_group) |
---|
576 | 764 | { |
---|
.. | .. |
---|
578 | 766 | } |
---|
579 | 767 | |
---|
580 | 768 | static inline void |
---|
581 | | -gpiochip_remove_pin_ranges(struct gpio_chip *chip) |
---|
| 769 | +gpiochip_remove_pin_ranges(struct gpio_chip *gc) |
---|
582 | 770 | { |
---|
583 | 771 | } |
---|
584 | 772 | |
---|
585 | 773 | #endif /* CONFIG_PINCTRL */ |
---|
586 | 774 | |
---|
587 | | -struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, |
---|
588 | | - const char *label); |
---|
| 775 | +struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, |
---|
| 776 | + unsigned int hwnum, |
---|
| 777 | + const char *label, |
---|
| 778 | + enum gpio_lookup_flags lflags, |
---|
| 779 | + enum gpiod_flags dflags); |
---|
589 | 780 | void gpiochip_free_own_desc(struct gpio_desc *desc); |
---|
| 781 | + |
---|
| 782 | +#ifdef CONFIG_GPIOLIB |
---|
| 783 | + |
---|
| 784 | +/* lock/unlock as IRQ */ |
---|
| 785 | +int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset); |
---|
| 786 | +void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset); |
---|
| 787 | + |
---|
| 788 | + |
---|
| 789 | +struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); |
---|
590 | 790 | |
---|
591 | 791 | #else /* CONFIG_GPIOLIB */ |
---|
592 | 792 | |
---|
.. | .. |
---|
597 | 797 | return ERR_PTR(-ENODEV); |
---|
598 | 798 | } |
---|
599 | 799 | |
---|
| 800 | +static inline int gpiochip_lock_as_irq(struct gpio_chip *gc, |
---|
| 801 | + unsigned int offset) |
---|
| 802 | +{ |
---|
| 803 | + WARN_ON(1); |
---|
| 804 | + return -EINVAL; |
---|
| 805 | +} |
---|
| 806 | + |
---|
| 807 | +static inline void gpiochip_unlock_as_irq(struct gpio_chip *gc, |
---|
| 808 | + unsigned int offset) |
---|
| 809 | +{ |
---|
| 810 | + WARN_ON(1); |
---|
| 811 | +} |
---|
600 | 812 | #endif /* CONFIG_GPIOLIB */ |
---|
601 | 813 | |
---|
602 | | -#endif |
---|
| 814 | +#endif /* __LINUX_GPIO_DRIVER_H */ |
---|