hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/include/linux/gpio/driver.h
....@@ -10,6 +10,7 @@
1010 #include <linux/lockdep.h>
1111 #include <linux/pinctrl/pinctrl.h>
1212 #include <linux/pinctrl/pinconf-generic.h>
13
+#include <linux/android_kabi.h>
1314
1415 struct gpio_desc;
1516 struct of_phandle_args;
....@@ -17,10 +18,14 @@
1718 struct seq_file;
1819 struct gpio_device;
1920 struct module;
21
+enum gpiod_flags;
22
+enum gpio_lookup_flags;
2023
21
-#ifdef CONFIG_GPIOLIB
24
+struct gpio_chip;
2225
23
-#ifdef CONFIG_GPIOLIB_IRQCHIP
26
+#define GPIO_LINE_DIRECTION_IN 1
27
+#define GPIO_LINE_DIRECTION_OUT 0
28
+
2429 /**
2530 * struct gpio_irq_chip - GPIO interrupt controller
2631 */
....@@ -49,10 +54,79 @@
4954
5055 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
5156 /**
57
+ * @fwnode:
58
+ *
59
+ * Firmware node corresponding to this gpiochip/irqchip, necessary
60
+ * for hierarchical irqdomain support.
61
+ */
62
+ struct fwnode_handle *fwnode;
63
+
64
+ /**
5265 * @parent_domain:
5366 *
67
+ * If non-NULL, will be set as the parent of this GPIO interrupt
68
+ * controller's IRQ domain to establish a hierarchical interrupt
69
+ * domain. The presence of this will activate the hierarchical
70
+ * interrupt support.
5471 */
5572 struct irq_domain *parent_domain;
73
+
74
+ /**
75
+ * @child_to_parent_hwirq:
76
+ *
77
+ * This callback translates a child hardware IRQ offset to a parent
78
+ * hardware IRQ offset on a hierarchical interrupt chip. The child
79
+ * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
80
+ * ngpio field of struct gpio_chip) and the corresponding parent
81
+ * hardware IRQ and type (such as IRQ_TYPE_*) shall be returned by
82
+ * the driver. The driver can calculate this from an offset or using
83
+ * a lookup table or whatever method is best for this chip. Return
84
+ * 0 on successful translation in the driver.
85
+ *
86
+ * If some ranges of hardware IRQs do not have a corresponding parent
87
+ * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
88
+ * @need_valid_mask to make these GPIO lines unavailable for
89
+ * translation.
90
+ */
91
+ int (*child_to_parent_hwirq)(struct gpio_chip *gc,
92
+ unsigned int child_hwirq,
93
+ unsigned int child_type,
94
+ unsigned int *parent_hwirq,
95
+ unsigned int *parent_type);
96
+
97
+ /**
98
+ * @populate_parent_alloc_arg :
99
+ *
100
+ * This optional callback allocates and populates the specific struct
101
+ * for the parent's IRQ domain. If this is not specified, then
102
+ * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
103
+ * variant named &gpiochip_populate_parent_fwspec_fourcell is also
104
+ * available.
105
+ */
106
+ void *(*populate_parent_alloc_arg)(struct gpio_chip *gc,
107
+ unsigned int parent_hwirq,
108
+ unsigned int parent_type);
109
+
110
+ /**
111
+ * @child_offset_to_irq:
112
+ *
113
+ * This optional callback is used to translate the child's GPIO line
114
+ * offset on the GPIO chip to an IRQ number for the GPIO to_irq()
115
+ * callback. If this is not specified, then a default callback will be
116
+ * provided that returns the line offset.
117
+ */
118
+ unsigned int (*child_offset_to_irq)(struct gpio_chip *gc,
119
+ unsigned int pin);
120
+
121
+ /**
122
+ * @child_irq_domain_ops:
123
+ *
124
+ * The IRQ domain operations that will be used for this GPIO IRQ
125
+ * chip. If no operations are provided, then default callbacks will
126
+ * be populated to setup the IRQ hierarchy. Some drivers need to
127
+ * supply their own translate function.
128
+ */
129
+ struct irq_domain_ops child_irq_domain_ops;
56130 #endif
57131
58132 /**
....@@ -74,9 +148,15 @@
74148 /**
75149 * @lock_key:
76150 *
77
- * Per GPIO IRQ chip lockdep classes.
151
+ * Per GPIO IRQ chip lockdep class for IRQ lock.
78152 */
79153 struct lock_class_key *lock_key;
154
+
155
+ /**
156
+ * @request_key:
157
+ *
158
+ * Per GPIO IRQ chip lockdep class for IRQ request.
159
+ */
80160 struct lock_class_key *request_key;
81161
82162 /**
....@@ -103,13 +183,6 @@
103183 unsigned int num_parents;
104184
105185 /**
106
- * @parent_irq:
107
- *
108
- * For use by gpiochip_set_cascaded_irqchip()
109
- */
110
- unsigned int parent_irq;
111
-
112
- /**
113186 * @parents:
114187 *
115188 * A list of interrupt parents of a GPIO chip. This is owned by the
....@@ -132,11 +205,25 @@
132205 bool threaded;
133206
134207 /**
135
- * @need_valid_mask:
136
- *
137
- * If set core allocates @valid_mask with all bits set to one.
208
+ * @init_hw: optional routine to initialize hardware before
209
+ * an IRQ chip will be added. This is quite useful when
210
+ * a particular driver wants to clear IRQ related registers
211
+ * in order to avoid undesired events.
138212 */
139
- bool need_valid_mask;
213
+ int (*init_hw)(struct gpio_chip *gc);
214
+
215
+ /**
216
+ * @init_valid_mask: optional routine to initialize @valid_mask, to be
217
+ * used if not all GPIO lines are valid interrupts. Sometimes some
218
+ * lines just cannot fire interrupts, and this routine, when defined,
219
+ * is passed a bitmap in "valid_mask" and it will have ngpios
220
+ * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
221
+ * then directly set some bits to "0" if they cannot be used for
222
+ * interrupts.
223
+ */
224
+ void (*init_valid_mask)(struct gpio_chip *gc,
225
+ unsigned long *valid_mask,
226
+ unsigned int ngpios);
140227
141228 /**
142229 * @valid_mask:
....@@ -153,13 +240,44 @@
153240 * will allocate and map all IRQs during initialization.
154241 */
155242 unsigned int first;
156
-};
157243
158
-static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)
159
-{
160
- return container_of(chip, struct gpio_irq_chip, chip);
161
-}
162
-#endif
244
+ /**
245
+ * @irq_enable:
246
+ *
247
+ * Store old irq_chip irq_enable callback
248
+ */
249
+ void (*irq_enable)(struct irq_data *data);
250
+
251
+ /**
252
+ * @irq_disable:
253
+ *
254
+ * Store old irq_chip irq_disable callback
255
+ */
256
+ void (*irq_disable)(struct irq_data *data);
257
+ /**
258
+ * @irq_unmask:
259
+ *
260
+ * Store old irq_chip irq_unmask callback
261
+ */
262
+ void (*irq_unmask)(struct irq_data *data);
263
+
264
+ /**
265
+ * @irq_mask:
266
+ *
267
+ * Store old irq_chip irq_mask callback
268
+ */
269
+ void (*irq_mask)(struct irq_data *data);
270
+
271
+ /**
272
+ * @initialized:
273
+ *
274
+ * Flag to track GPIO chip irq member's initialization.
275
+ * This flag will make sure GPIO chip irq members are not used
276
+ * before they are initialized.
277
+ */
278
+ ANDROID_KABI_USE(1, bool initialized);
279
+ ANDROID_KABI_RESERVE(2);
280
+};
163281
164282 /**
165283 * struct gpio_chip - abstract a GPIO controller
....@@ -173,9 +291,13 @@
173291 * @free: optional hook for chip-specific deactivation, such as
174292 * disabling module power and clock; may sleep
175293 * @get_direction: returns direction for signal "offset", 0=out, 1=in,
176
- * (same as GPIOF_DIR_XXX), or negative error
294
+ * (same as GPIO_LINE_DIRECTION_OUT / GPIO_LINE_DIRECTION_IN),
295
+ * or negative error. It is recommended to always implement this
296
+ * function, even on input-only or output-only gpio chips.
177297 * @direction_input: configures signal "offset" as input, or returns error
298
+ * This can be omitted on input-only or output-only gpio chips.
178299 * @direction_output: configures signal "offset" as output, or returns error
300
+ * This can be omitted on input-only or output-only gpio chips.
179301 * @get: returns value for signal "offset", 0=low, 1=high, or negative error
180302 * @get_multiple: reads values for multiple signals defined by "mask" and
181303 * stores them in "bits", returns 0 on success or negative error
....@@ -188,6 +310,11 @@
188310 * @dbg_show: optional routine to show contents in debugfs; default code
189311 * will be used when this is omitted, but custom code can show extra
190312 * state (such as pullup/pulldown configuration).
313
+ * @init_valid_mask: optional routine to initialize @valid_mask, to be used if
314
+ * not all GPIOs are valid.
315
+ * @add_pin_ranges: optional routine to initialize pin ranges, to be used when
316
+ * requires special mapping of the pins that provides GPIO functionality.
317
+ * It is called after adding GPIO chip and before adding IRQ chip.
191318 * @base: identifies the first GPIO number handled by this chip;
192319 * or, if negative during registration, requests dynamic ID allocation.
193320 * DEPRECATION: providing anything non-negative and nailing the base
....@@ -215,9 +342,10 @@
215342 * @reg_dat: data (in) register for generic GPIO
216343 * @reg_set: output set register (out=high) for generic GPIO
217344 * @reg_clr: output clear register (out=low) for generic GPIO
218
- * @reg_dir: direction setting register for generic GPIO
219
- * @bgpio_dir_inverted: indicates that the direction register is inverted
220
- * (gpiolib private state variable)
345
+ * @reg_dir_out: direction out setting register for generic GPIO
346
+ * @reg_dir_in: direction in setting register for generic GPIO
347
+ * @bgpio_dir_unreadable: indicates that the direction register(s) cannot
348
+ * be read and we need to rely on out internal state tracking.
221349 * @bgpio_bits: number of register bits used for a generic GPIO i.e.
222350 * <register width> * 8
223351 * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
....@@ -225,7 +353,8 @@
225353 * @bgpio_data: shadowed data register for generic GPIO to clear/set bits
226354 * safely.
227355 * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
228
- * direction safely.
356
+ * direction safely. A "1" in this word means the line is set as
357
+ * output.
229358 *
230359 * A gpio_chip can help platforms abstract various sources of GPIOs so
231360 * they can all be accessed through a common programing interface.
....@@ -243,34 +372,41 @@
243372 struct device *parent;
244373 struct module *owner;
245374
246
- int (*request)(struct gpio_chip *chip,
247
- unsigned offset);
248
- void (*free)(struct gpio_chip *chip,
249
- unsigned offset);
250
- int (*get_direction)(struct gpio_chip *chip,
251
- unsigned offset);
252
- int (*direction_input)(struct gpio_chip *chip,
253
- unsigned offset);
254
- int (*direction_output)(struct gpio_chip *chip,
255
- unsigned offset, int value);
256
- int (*get)(struct gpio_chip *chip,
257
- unsigned offset);
258
- int (*get_multiple)(struct gpio_chip *chip,
375
+ int (*request)(struct gpio_chip *gc,
376
+ unsigned int offset);
377
+ void (*free)(struct gpio_chip *gc,
378
+ unsigned int offset);
379
+ int (*get_direction)(struct gpio_chip *gc,
380
+ unsigned int offset);
381
+ int (*direction_input)(struct gpio_chip *gc,
382
+ unsigned int offset);
383
+ int (*direction_output)(struct gpio_chip *gc,
384
+ unsigned int offset, int value);
385
+ int (*get)(struct gpio_chip *gc,
386
+ unsigned int offset);
387
+ int (*get_multiple)(struct gpio_chip *gc,
259388 unsigned long *mask,
260389 unsigned long *bits);
261
- void (*set)(struct gpio_chip *chip,
262
- unsigned offset, int value);
263
- void (*set_multiple)(struct gpio_chip *chip,
390
+ void (*set)(struct gpio_chip *gc,
391
+ unsigned int offset, int value);
392
+ void (*set_multiple)(struct gpio_chip *gc,
264393 unsigned long *mask,
265394 unsigned long *bits);
266
- int (*set_config)(struct gpio_chip *chip,
267
- unsigned offset,
395
+ int (*set_config)(struct gpio_chip *gc,
396
+ unsigned int offset,
268397 unsigned long config);
269
- int (*to_irq)(struct gpio_chip *chip,
270
- unsigned offset);
398
+ int (*to_irq)(struct gpio_chip *gc,
399
+ unsigned int offset);
271400
272401 void (*dbg_show)(struct seq_file *s,
273
- struct gpio_chip *chip);
402
+ struct gpio_chip *gc);
403
+
404
+ int (*init_valid_mask)(struct gpio_chip *gc,
405
+ unsigned long *valid_mask,
406
+ unsigned int ngpios);
407
+
408
+ int (*add_pin_ranges)(struct gpio_chip *gc);
409
+
274410 int base;
275411 u16 ngpio;
276412 const char *const *names;
....@@ -283,13 +419,14 @@
283419 void __iomem *reg_dat;
284420 void __iomem *reg_set;
285421 void __iomem *reg_clr;
286
- void __iomem *reg_dir;
287
- bool bgpio_dir_inverted;
422
+ void __iomem *reg_dir_out;
423
+ void __iomem *reg_dir_in;
424
+ bool bgpio_dir_unreadable;
288425 int bgpio_bits;
289426 spinlock_t bgpio_lock;
290427 unsigned long bgpio_data;
291428 unsigned long bgpio_dir;
292
-#endif
429
+#endif /* CONFIG_GPIO_GENERIC */
293430
294431 #ifdef CONFIG_GPIOLIB_IRQCHIP
295432 /*
....@@ -304,14 +441,7 @@
304441 * used to handle IRQs for most practical cases.
305442 */
306443 struct gpio_irq_chip irq;
307
-#endif
308
-
309
- /**
310
- * @need_valid_mask:
311
- *
312
- * If set core allocates @valid_mask with all bits set to one.
313
- */
314
- bool need_valid_mask;
444
+#endif /* CONFIG_GPIOLIB_IRQCHIP */
315445
316446 /**
317447 * @valid_mask:
....@@ -349,80 +479,106 @@
349479 */
350480 int (*of_xlate)(struct gpio_chip *gc,
351481 const struct of_phandle_args *gpiospec, u32 *flags);
352
-#endif
482
+#endif /* CONFIG_OF_GPIO */
483
+
484
+ ANDROID_KABI_RESERVE(1);
485
+ ANDROID_KABI_RESERVE(2);
353486 };
354487
355
-extern const char *gpiochip_is_requested(struct gpio_chip *chip,
356
- unsigned offset);
488
+extern const char *gpiochip_is_requested(struct gpio_chip *gc,
489
+ unsigned int offset);
490
+
491
+/**
492
+ * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range
493
+ * @chip: the chip to query
494
+ * @i: loop variable
495
+ * @base: first GPIO in the range
496
+ * @size: amount of GPIOs to check starting from @base
497
+ * @label: label of current GPIO
498
+ */
499
+#define for_each_requested_gpio_in_range(chip, i, base, size, label) \
500
+ for (i = 0; i < size; i++) \
501
+ if ((label = gpiochip_is_requested(chip, base + i)) == NULL) {} else
502
+
503
+/* Iterates over all requested GPIO of the given @chip */
504
+#define for_each_requested_gpio(chip, i, label) \
505
+ for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label)
357506
358507 /* add/remove chips */
359
-extern int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
508
+extern int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
360509 struct lock_class_key *lock_key,
361510 struct lock_class_key *request_key);
362511
363512 /**
364513 * gpiochip_add_data() - register a gpio_chip
365
- * @chip: the chip to register, with chip->base initialized
514
+ * @gc: the chip to register, with gc->base initialized
366515 * @data: driver-private data associated with this chip
367516 *
368517 * Context: potentially before irqs will work
369518 *
370519 * When gpiochip_add_data() is called very early during boot, so that GPIOs
371
- * can be freely used, the chip->parent device must be registered before
520
+ * can be freely used, the gc->parent device must be registered before
372521 * the gpio framework's arch_initcall(). Otherwise sysfs initialization
373522 * for GPIOs will fail rudely.
374523 *
375524 * gpiochip_add_data() must only be called after gpiolib initialization,
376525 * ie after core_initcall().
377526 *
378
- * If chip->base is negative, this requests dynamic assignment of
527
+ * If gc->base is negative, this requests dynamic assignment of
379528 * a range of valid GPIOs.
380529 *
381530 * Returns:
382531 * A negative errno if the chip can't be registered, such as because the
383
- * chip->base is invalid or already associated with a different chip.
532
+ * gc->base is invalid or already associated with a different chip.
384533 * Otherwise it returns zero as a success code.
385534 */
386535 #ifdef CONFIG_LOCKDEP
387
-#define gpiochip_add_data(chip, data) ({ \
536
+#define gpiochip_add_data(gc, data) ({ \
388537 static struct lock_class_key lock_key; \
389538 static struct lock_class_key request_key; \
390
- gpiochip_add_data_with_key(chip, data, &lock_key, \
539
+ gpiochip_add_data_with_key(gc, data, &lock_key, \
540
+ &request_key); \
541
+ })
542
+#define devm_gpiochip_add_data(dev, gc, data) ({ \
543
+ static struct lock_class_key lock_key; \
544
+ static struct lock_class_key request_key; \
545
+ devm_gpiochip_add_data_with_key(dev, gc, data, &lock_key, \
391546 &request_key); \
392547 })
393548 #else
394
-#define gpiochip_add_data(chip, data) gpiochip_add_data_with_key(chip, data, NULL, NULL)
395
-#endif
549
+#define gpiochip_add_data(gc, data) gpiochip_add_data_with_key(gc, data, NULL, NULL)
550
+#define devm_gpiochip_add_data(dev, gc, data) \
551
+ devm_gpiochip_add_data_with_key(dev, gc, data, NULL, NULL)
552
+#endif /* CONFIG_LOCKDEP */
396553
397
-static inline int gpiochip_add(struct gpio_chip *chip)
554
+static inline int gpiochip_add(struct gpio_chip *gc)
398555 {
399
- return gpiochip_add_data(chip, NULL);
556
+ return gpiochip_add_data(gc, NULL);
400557 }
401
-extern void gpiochip_remove(struct gpio_chip *chip);
402
-extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
403
- void *data);
404
-extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip);
558
+extern void gpiochip_remove(struct gpio_chip *gc);
559
+extern int devm_gpiochip_add_data_with_key(struct device *dev, struct gpio_chip *gc, void *data,
560
+ struct lock_class_key *lock_key,
561
+ struct lock_class_key *request_key);
405562
406563 extern struct gpio_chip *gpiochip_find(void *data,
407
- int (*match)(struct gpio_chip *chip, void *data));
564
+ int (*match)(struct gpio_chip *gc, void *data));
408565
409
-/* lock/unlock as IRQ */
410
-int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
411
-void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
412
-bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset);
566
+bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset);
567
+int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset);
568
+void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset);
569
+void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset);
570
+void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset);
413571
414572 /* Line status inquiry for drivers */
415
-bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset);
416
-bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset);
573
+bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset);
574
+bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset);
417575
418576 /* Sleep persistence inquiry for drivers */
419
-bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset);
420
-bool gpiochip_line_is_valid(const struct gpio_chip *chip, unsigned int offset);
577
+bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset);
578
+bool gpiochip_line_is_valid(const struct gpio_chip *gc, unsigned int offset);
421579
422580 /* get driver data */
423
-void *gpiochip_get_data(struct gpio_chip *chip);
424
-
425
-struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
581
+void *gpiochip_get_data(struct gpio_chip *gc);
426582
427583 struct bgpio_pdata {
428584 const char *label;
....@@ -430,7 +586,32 @@
430586 int ngpio;
431587 };
432588
433
-#if IS_ENABLED(CONFIG_GPIO_GENERIC)
589
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
590
+
591
+void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
592
+ unsigned int parent_hwirq,
593
+ unsigned int parent_type);
594
+void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
595
+ unsigned int parent_hwirq,
596
+ unsigned int parent_type);
597
+
598
+#else
599
+
600
+static inline void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
601
+ unsigned int parent_hwirq,
602
+ unsigned int parent_type)
603
+{
604
+ return NULL;
605
+}
606
+
607
+static inline void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
608
+ unsigned int parent_hwirq,
609
+ unsigned int parent_type)
610
+{
611
+ return NULL;
612
+}
613
+
614
+#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
434615
435616 int bgpio_init(struct gpio_chip *gc, struct device *dev,
436617 unsigned long sz, void __iomem *dat, void __iomem *set,
....@@ -443,25 +624,22 @@
443624 #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
444625 #define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
445626 #define BGPIOF_NO_OUTPUT BIT(5) /* only input */
446
-
447
-#endif
448
-
449
-#ifdef CONFIG_GPIOLIB_IRQCHIP
627
+#define BGPIOF_NO_SET_ON_INPUT BIT(6)
450628
451629 int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
452630 irq_hw_number_t hwirq);
453631 void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq);
454632
455
-void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
456
- struct irq_chip *irqchip,
457
- unsigned int parent_irq,
458
- irq_flow_handler_t parent_handler);
633
+int gpiochip_irq_domain_activate(struct irq_domain *domain,
634
+ struct irq_data *data, bool reserve);
635
+void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
636
+ struct irq_data *data);
459637
460
-void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
638
+void gpiochip_set_nested_irqchip(struct gpio_chip *gc,
461639 struct irq_chip *irqchip,
462640 unsigned int parent_irq);
463641
464
-int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
642
+int gpiochip_irqchip_add_key(struct gpio_chip *gc,
465643 struct irq_chip *irqchip,
466644 unsigned int first_irq,
467645 irq_flow_handler_t handler,
....@@ -470,8 +648,20 @@
470648 struct lock_class_key *lock_key,
471649 struct lock_class_key *request_key);
472650
473
-bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
651
+bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
474652 unsigned int offset);
653
+
654
+#ifdef CONFIG_GPIOLIB_IRQCHIP
655
+int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
656
+ struct irq_domain *domain);
657
+#else
658
+static inline int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
659
+ struct irq_domain *domain)
660
+{
661
+ WARN_ON(1);
662
+ return -EINVAL;
663
+}
664
+#endif
475665
476666 #ifdef CONFIG_LOCKDEP
477667
....@@ -481,7 +671,7 @@
481671 * boilerplate static inlines provides such a key for each
482672 * unique instance.
483673 */
484
-static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
674
+static inline int gpiochip_irqchip_add(struct gpio_chip *gc,
485675 struct irq_chip *irqchip,
486676 unsigned int first_irq,
487677 irq_flow_handler_t handler,
....@@ -490,12 +680,12 @@
490680 static struct lock_class_key lock_key;
491681 static struct lock_class_key request_key;
492682
493
- return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
683
+ return gpiochip_irqchip_add_key(gc, irqchip, first_irq,
494684 handler, type, false,
495685 &lock_key, &request_key);
496686 }
497687
498
-static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
688
+static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gc,
499689 struct irq_chip *irqchip,
500690 unsigned int first_irq,
501691 irq_flow_handler_t handler,
....@@ -505,40 +695,36 @@
505695 static struct lock_class_key lock_key;
506696 static struct lock_class_key request_key;
507697
508
- return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
698
+ return gpiochip_irqchip_add_key(gc, irqchip, first_irq,
509699 handler, type, true,
510700 &lock_key, &request_key);
511701 }
512
-#else
513
-static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
702
+#else /* ! CONFIG_LOCKDEP */
703
+static inline int gpiochip_irqchip_add(struct gpio_chip *gc,
514704 struct irq_chip *irqchip,
515705 unsigned int first_irq,
516706 irq_flow_handler_t handler,
517707 unsigned int type)
518708 {
519
- return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
709
+ return gpiochip_irqchip_add_key(gc, irqchip, first_irq,
520710 handler, type, false, NULL, NULL);
521711 }
522712
523
-static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
713
+static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gc,
524714 struct irq_chip *irqchip,
525715 unsigned int first_irq,
526716 irq_flow_handler_t handler,
527717 unsigned int type)
528718 {
529
- return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
719
+ return gpiochip_irqchip_add_key(gc, irqchip, first_irq,
530720 handler, type, true, NULL, NULL);
531721 }
532722 #endif /* CONFIG_LOCKDEP */
533723
534
-#endif /* CONFIG_GPIOLIB_IRQCHIP */
535
-
536
-int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset);
537
-void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset);
538
-int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
724
+int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset);
725
+void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset);
726
+int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
539727 unsigned long config);
540
-
541
-#ifdef CONFIG_PINCTRL
542728
543729 /**
544730 * struct gpio_pin_range - pin range controlled by a gpio chip
....@@ -552,25 +738,27 @@
552738 struct pinctrl_gpio_range range;
553739 };
554740
555
-int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
741
+#ifdef CONFIG_PINCTRL
742
+
743
+int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
556744 unsigned int gpio_offset, unsigned int pin_offset,
557745 unsigned int npins);
558
-int gpiochip_add_pingroup_range(struct gpio_chip *chip,
746
+int gpiochip_add_pingroup_range(struct gpio_chip *gc,
559747 struct pinctrl_dev *pctldev,
560748 unsigned int gpio_offset, const char *pin_group);
561
-void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
749
+void gpiochip_remove_pin_ranges(struct gpio_chip *gc);
562750
563
-#else
751
+#else /* ! CONFIG_PINCTRL */
564752
565753 static inline int
566
-gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
754
+gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
567755 unsigned int gpio_offset, unsigned int pin_offset,
568756 unsigned int npins)
569757 {
570758 return 0;
571759 }
572760 static inline int
573
-gpiochip_add_pingroup_range(struct gpio_chip *chip,
761
+gpiochip_add_pingroup_range(struct gpio_chip *gc,
574762 struct pinctrl_dev *pctldev,
575763 unsigned int gpio_offset, const char *pin_group)
576764 {
....@@ -578,15 +766,27 @@
578766 }
579767
580768 static inline void
581
-gpiochip_remove_pin_ranges(struct gpio_chip *chip)
769
+gpiochip_remove_pin_ranges(struct gpio_chip *gc)
582770 {
583771 }
584772
585773 #endif /* CONFIG_PINCTRL */
586774
587
-struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
588
- const char *label);
775
+struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
776
+ unsigned int hwnum,
777
+ const char *label,
778
+ enum gpio_lookup_flags lflags,
779
+ enum gpiod_flags dflags);
589780 void gpiochip_free_own_desc(struct gpio_desc *desc);
781
+
782
+#ifdef CONFIG_GPIOLIB
783
+
784
+/* lock/unlock as IRQ */
785
+int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset);
786
+void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset);
787
+
788
+
789
+struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
590790
591791 #else /* CONFIG_GPIOLIB */
592792
....@@ -597,6 +797,18 @@
597797 return ERR_PTR(-ENODEV);
598798 }
599799
800
+static inline int gpiochip_lock_as_irq(struct gpio_chip *gc,
801
+ unsigned int offset)
802
+{
803
+ WARN_ON(1);
804
+ return -EINVAL;
805
+}
806
+
807
+static inline void gpiochip_unlock_as_irq(struct gpio_chip *gc,
808
+ unsigned int offset)
809
+{
810
+ WARN_ON(1);
811
+}
600812 #endif /* CONFIG_GPIOLIB */
601813
602
-#endif
814
+#endif /* __LINUX_GPIO_DRIVER_H */