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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d 
 kernel/include/linux/arm-smccc.h
....@@ -1,25 +1,19 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23  * Copyright (c) 2015, Linaro Limited
3
- *
4
- * This software is licensed under the terms of the GNU General Public
5
- * License version 2, as published by the Free Software Foundation, and
6
- * may be copied, distributed, and modified under those terms.
7
- *
8
- * This program is distributed in the hope that it will be useful,
9
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
10
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
- * GNU General Public License for more details.
12
- *
134  */
145 #ifndef __LINUX_ARM_SMCCC_H
156 #define __LINUX_ARM_SMCCC_H
167 
8
+#include <linux/init.h>
179 #include <uapi/linux/const.h>
1810 
1911 /*
2012  * This file provides common defines for ARM SMC Calling Convention as
2113  * specified in
22
- * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
14
+ * https://developer.arm.com/docs/den0028/latest
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+ *
16
+ * This code is up-to-date with version DEN 0028 C
2317  */
2418 
2519 #define ARM_SMCCC_STD_CALL	        _AC(0,U)
....@@ -54,6 +48,8 @@
5448 #define ARM_SMCCC_OWNER_SIP		2
5549 #define ARM_SMCCC_OWNER_OEM		3
5650 #define ARM_SMCCC_OWNER_STANDARD	4
51
+#define ARM_SMCCC_OWNER_STANDARD_HYP	5
52
+#define ARM_SMCCC_OWNER_VENDOR_HYP	6
5753 #define ARM_SMCCC_OWNER_TRUSTED_APP	48
5854 #define ARM_SMCCC_OWNER_TRUSTED_APP_END	49
5955 #define ARM_SMCCC_OWNER_TRUSTED_OS	50
....@@ -64,6 +60,7 @@
6460 
6561 #define ARM_SMCCC_VERSION_1_0		0x10000
6662 #define ARM_SMCCC_VERSION_1_1		0x10001
63
+#define ARM_SMCCC_VERSION_1_2		0x10002
6764 
6865 #define ARM_SMCCC_VERSION_FUNC_ID					\
6966 	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
....@@ -75,6 +72,11 @@
7572 			   ARM_SMCCC_SMC_32,				\
7673 			   0, 1)
7774 
75
+#define ARM_SMCCC_ARCH_SOC_ID						\
76
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
77
+			   ARM_SMCCC_SMC_32,				\
78
+			   0, 2)
79
+
7880 #define ARM_SMCCC_ARCH_WORKAROUND_1					\
7981 	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
8082 			   ARM_SMCCC_SMC_32,				\
....@@ -84,6 +86,66 @@
8486 	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
8587 			   ARM_SMCCC_SMC_32,				\
8688 			   0, 0x7fff)
89
+
90
+#define ARM_SMCCC_ARCH_WORKAROUND_3					\
91
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,				\
92
+			   ARM_SMCCC_SMC_32,				\
93
+			   0, 0x3fff)
94
+
95
+#define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED	1
96
+
97
+/* Paravirtualised time calls (defined by ARM DEN0057A) */
98
+#define ARM_SMCCC_HV_PV_TIME_FEATURES				\
99
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
100
+			   ARM_SMCCC_SMC_64,			\
101
+			   ARM_SMCCC_OWNER_STANDARD_HYP,	\
102
+			   0x20)
103
+
104
+#define ARM_SMCCC_HV_PV_TIME_ST					\
105
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
106
+			   ARM_SMCCC_SMC_64,			\
107
+			   ARM_SMCCC_OWNER_STANDARD_HYP,	\
108
+			   0x21)
109
+
110
+/* TRNG entropy source calls (defined by ARM DEN0098) */
111
+#define ARM_SMCCC_TRNG_VERSION					\
112
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
113
+			   ARM_SMCCC_SMC_32,			\
114
+			   ARM_SMCCC_OWNER_STANDARD,		\
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+			   0x50)
116
+
117
+#define ARM_SMCCC_TRNG_FEATURES					\
118
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
119
+			   ARM_SMCCC_SMC_32,			\
120
+			   ARM_SMCCC_OWNER_STANDARD,		\
121
+			   0x51)
122
+
123
+#define ARM_SMCCC_TRNG_GET_UUID					\
124
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
125
+			   ARM_SMCCC_SMC_32,			\
126
+			   ARM_SMCCC_OWNER_STANDARD,		\
127
+			   0x52)
128
+
129
+#define ARM_SMCCC_TRNG_RND32					\
130
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
131
+			   ARM_SMCCC_SMC_32,			\
132
+			   ARM_SMCCC_OWNER_STANDARD,		\
133
+			   0x53)
134
+
135
+#define ARM_SMCCC_TRNG_RND64					\
136
+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,			\
137
+			   ARM_SMCCC_SMC_64,			\
138
+			   ARM_SMCCC_OWNER_STANDARD,		\
139
+			   0x53)
140
+
141
+/*
142
+ * Return codes defined in ARM DEN 0070A
143
+ * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C
144
+ */
145
+#define SMCCC_RET_SUCCESS			0
146
+#define SMCCC_RET_NOT_SUPPORTED			-1
147
+#define SMCCC_RET_NOT_REQUIRED			-2
148
+#define SMCCC_RET_INVALID_PARAMETER		-3
87149 
88150 #ifndef __ASSEMBLY__
89151 
....@@ -104,6 +166,19 @@
104166  * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
105167  */
106168 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
169
+
170
+/**
171
+ * arm_smccc_get_version()
172
+ *
173
+ * Returns the version to be used for SMCCCv1.1 or later.
174
+ *
175
+ * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this
176
+ * does not imply the presence of firmware or a valid conduit. Caller
177
+ * handling SMCCCv1.0 must determine the conduit by other means.
178
+ */
179
+u32 arm_smccc_get_version(void);
180
+
181
+void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit);
107182 
108183 /**
109184  * struct arm_smccc_res - Result from SMC/HVC call
....@@ -191,87 +266,67 @@
191266 #define __count_args(...)						\
192267 	___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
193268 
194
-#define __constraint_write_0						\
195
-	"+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3)
196
-#define __constraint_write_1						\
197
-	"+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3)
198
-#define __constraint_write_2						\
199
-	"+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3)
200
-#define __constraint_write_3						\
201
-	"+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3)
202
-#define __constraint_write_4	__constraint_write_3
203
-#define __constraint_write_5	__constraint_write_4
204
-#define __constraint_write_6	__constraint_write_5
205
-#define __constraint_write_7	__constraint_write_6
206
-
207
-#define __constraint_read_0
208
-#define __constraint_read_1
209
-#define __constraint_read_2
210
-#define __constraint_read_3
211
-#define __constraint_read_4	"r" (r4)
212
-#define __constraint_read_5	__constraint_read_4, "r" (r5)
213
-#define __constraint_read_6	__constraint_read_5, "r" (r6)
214
-#define __constraint_read_7	__constraint_read_6, "r" (r7)
269
+#define __constraint_read_0	"r" (arg0)
270
+#define __constraint_read_1	__constraint_read_0, "r" (arg1)
271
+#define __constraint_read_2	__constraint_read_1, "r" (arg2)
272
+#define __constraint_read_3	__constraint_read_2, "r" (arg3)
273
+#define __constraint_read_4	__constraint_read_3, "r" (arg4)
274
+#define __constraint_read_5	__constraint_read_4, "r" (arg5)
275
+#define __constraint_read_6	__constraint_read_5, "r" (arg6)
276
+#define __constraint_read_7	__constraint_read_6, "r" (arg7)
215277 
216278 #define __declare_arg_0(a0, res)					\
217279 	struct arm_smccc_res   *___res = res;				\
218
-	register unsigned long r0 asm("r0") = (u32)a0;			\
219
-	register unsigned long r1 asm("r1");				\
220
-	register unsigned long r2 asm("r2");				\
221
-	register unsigned long r3 asm("r3")
280
+	register unsigned long arg0 asm("r0") = (u32)a0
222281 
223282 #define __declare_arg_1(a0, a1, res)					\
224283 	typeof(a1) __a1 = a1;						\
225284 	struct arm_smccc_res   *___res = res;				\
226
-	register unsigned long r0 asm("r0") = (u32)a0;			\
227
-	register unsigned long r1 asm("r1") = __a1;			\
228
-	register unsigned long r2 asm("r2");				\
229
-	register unsigned long r3 asm("r3")
285
+	register unsigned long arg0 asm("r0") = (u32)a0;			\
286
+	register typeof(a1) arg1 asm("r1") = __a1
230287 
231288 #define __declare_arg_2(a0, a1, a2, res)				\
232289 	typeof(a1) __a1 = a1;						\
233290 	typeof(a2) __a2 = a2;						\
234291 	struct arm_smccc_res   *___res = res;				\
235
-	register unsigned long r0 asm("r0") = (u32)a0;			\
236
-	register unsigned long r1 asm("r1") = __a1;			\
237
-	register unsigned long r2 asm("r2") = __a2;			\
238
-	register unsigned long r3 asm("r3")
292
+	register unsigned long arg0 asm("r0") = (u32)a0;			\
293
+	register typeof(a1) arg1 asm("r1") = __a1;			\
294
+	register typeof(a2) arg2 asm("r2") = __a2
239295 
240296 #define __declare_arg_3(a0, a1, a2, a3, res)				\
241297 	typeof(a1) __a1 = a1;						\
242298 	typeof(a2) __a2 = a2;						\
243299 	typeof(a3) __a3 = a3;						\
244300 	struct arm_smccc_res   *___res = res;				\
245
-	register unsigned long r0 asm("r0") = (u32)a0;			\
246
-	register unsigned long r1 asm("r1") = __a1;			\
247
-	register unsigned long r2 asm("r2") = __a2;			\
248
-	register unsigned long r3 asm("r3") = __a3
301
+	register unsigned long arg0 asm("r0") = (u32)a0;			\
302
+	register typeof(a1) arg1 asm("r1") = __a1;			\
303
+	register typeof(a2) arg2 asm("r2") = __a2;			\
304
+	register typeof(a3) arg3 asm("r3") = __a3
249305 
250306 #define __declare_arg_4(a0, a1, a2, a3, a4, res)			\
251307 	typeof(a4) __a4 = a4;						\
252308 	__declare_arg_3(a0, a1, a2, a3, res);				\
253
-	register unsigned long r4 asm("r4") = __a4
309
+	register typeof(a4) arg4 asm("r4") = __a4
254310 
255311 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res)			\
256312 	typeof(a5) __a5 = a5;						\
257313 	__declare_arg_4(a0, a1, a2, a3, a4, res);			\
258
-	register unsigned long r5 asm("r5") = __a5
314
+	register typeof(a5) arg5 asm("r5") = __a5
259315 
260316 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res)		\
261317 	typeof(a6) __a6 = a6;						\
262318 	__declare_arg_5(a0, a1, a2, a3, a4, a5, res);			\
263
-	register unsigned long r6 asm("r6") = __a6
319
+	register typeof(a6) arg6 asm("r6") = __a6
264320 
265321 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res)		\
266322 	typeof(a7) __a7 = a7;						\
267323 	__declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res);		\
268
-	register unsigned long r7 asm("r7") = __a7
324
+	register typeof(a7) arg7 asm("r7") = __a7
269325 
270326 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
271327 #define __declare_args(count, ...)  ___declare_args(count, __VA_ARGS__)
272328 
273329 #define ___constraints(count)						\
274
-	: __constraint_write_ ## count					\
275330 	: __constraint_read_ ## count					\
276331 	: "memory"
277332 #define __constraints(count)	___constraints(count)
....@@ -283,8 +338,13 @@
283338  */
284339 #define __arm_smccc_1_1(inst, ...)					\
285340 	do {								\
341
+		register unsigned long r0 asm("r0");			\
342
+		register unsigned long r1 asm("r1");			\
343
+		register unsigned long r2 asm("r2");			\
344
+		register unsigned long r3 asm("r3"); 			\
286345 		__declare_args(__count_args(__VA_ARGS__), __VA_ARGS__);	\
287
-		asm volatile(inst "\n"					\
346
+		asm volatile(inst "\n" :				\
347
+			     "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3)	\
288348 			     __constraints(__count_args(__VA_ARGS__)));	\
289349 		if (___res)						\
290350 			*___res = (typeof(*___res)){r0, r1, r2, r3};	\
....@@ -322,11 +382,6 @@
322382  */
323383 #define arm_smccc_1_1_hvc(...)	__arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
324384 
325
-/* Return codes defined in ARM DEN 0070A */
326
-#define SMCCC_RET_SUCCESS			0
327
-#define SMCCC_RET_NOT_SUPPORTED			-1
328
-#define SMCCC_RET_NOT_REQUIRED			-2
329
-
330385 /*
331386  * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
332387  * Used when the SMCCC conduit is not defined. The empty asm statement
....@@ -335,7 +390,7 @@
335390 #define __fail_smccc_1_1(...)						\
336391 	do {								\
337392 		__declare_args(__count_args(__VA_ARGS__), __VA_ARGS__);	\
338
-		asm ("" __constraints(__count_args(__VA_ARGS__)));	\
393
+		asm ("" : __constraints(__count_args(__VA_ARGS__)));	\
339394 		if (___res)						\
340395 			___res->a0 = SMCCC_RET_NOT_SUPPORTED;		\
341396 	} while (0)