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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d 
 kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
....@@ -1,71 +1,23 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*******************************************************************************
23   This contains the functions to handle the pci driver.
34 
45   Copyright (C) 2011-2012  Vayavya Labs Pvt Ltd
56 
6
-  This program is free software; you can redistribute it and/or modify it
7
-  under the terms and conditions of the GNU General Public License,
8
-  version 2, as published by the Free Software Foundation.
9
-
10
-  This program is distributed in the hope it will be useful, but WITHOUT
11
-  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12
-  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13
-  more details.
14
-
15
-  The full GNU General Public License is included in this distribution in
16
-  the file called "COPYING".
177 
188   Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
199   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
2010 *******************************************************************************/
2111 
12
+#include <linux/clk-provider.h>
2213 #include <linux/pci.h>
2314 #include <linux/dmi.h>
2415 
2516 #include "stmmac.h"
2617 
27
-/*
28
- * This struct is used to associate PCI Function of MAC controller on a board,
29
- * discovered via DMI, with the address of PHY connected to the MAC. The
30
- * negative value of the address means that MAC controller is not connected
31
- * with PHY.
32
- */
33
-struct stmmac_pci_func_data {
34
-	unsigned int func;
35
-	int phy_addr;
36
-};
37
-
38
-struct stmmac_pci_dmi_data {
39
-	const struct stmmac_pci_func_data *func;
40
-	size_t nfuncs;
41
-};
42
-
4318 struct stmmac_pci_info {
4419 	int (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);
4520 };
46
-
47
-static int stmmac_pci_find_phy_addr(struct pci_dev *pdev,
48
-				    const struct dmi_system_id *dmi_list)
49
-{
50
-	const struct stmmac_pci_func_data *func_data;
51
-	const struct stmmac_pci_dmi_data *dmi_data;
52
-	const struct dmi_system_id *dmi_id;
53
-	int func = PCI_FUNC(pdev->devfn);
54
-	size_t n;
55
-
56
-	dmi_id = dmi_first_match(dmi_list);
57
-	if (!dmi_id)
58
-		return -ENODEV;
59
-
60
-	dmi_data = dmi_id->driver_data;
61
-	func_data = dmi_data->func;
62
-
63
-	for (n = 0; n < dmi_data->nfuncs; n++, func_data++)
64
-		if (func_data->func == func)
65
-			return func_data->phy_addr;
66
-
67
-	return -ENODEV;
68
-}
6921 
7022 static void common_default_data(struct plat_stmmacenet_data *plat)
7123 {
....@@ -73,8 +25,7 @@
7325 	plat->has_gmac = 1;
7426 	plat->force_sf_dma_mode = 1;
7527 
76
-	plat->mdio_bus_data->phy_reset = NULL;
77
-	plat->mdio_bus_data->phy_mask = 0;
28
+	plat->mdio_bus_data->needs_reset = true;
7829 
7930 	/* Set default value for multicast hash bins */
8031 	plat->multicast_filter_bins = HASH_TABLE_SIZE;
....@@ -105,7 +56,7 @@
10556 
10657 	plat->bus_id = 1;
10758 	plat->phy_addr = 0;
108
-	plat->interface = PHY_INTERFACE_MODE_GMII;
59
+	plat->phy_interface = PHY_INTERFACE_MODE_GMII;
10960 
11061 	plat->dma_cfg->pbl = 32;
11162 	plat->dma_cfg->pblx8 = true;
....@@ -118,110 +69,73 @@
11869 	.setup = stmmac_default_data,
11970 };
12071 
121
-static const struct stmmac_pci_func_data galileo_stmmac_func_data[] = {
122
-	{
123
-		.func = 6,
124
-		.phy_addr = 1,
125
-	},
126
-};
127
-
128
-static const struct stmmac_pci_dmi_data galileo_stmmac_dmi_data = {
129
-	.func = galileo_stmmac_func_data,
130
-	.nfuncs = ARRAY_SIZE(galileo_stmmac_func_data),
131
-};
132
-
133
-static const struct stmmac_pci_func_data iot2040_stmmac_func_data[] = {
134
-	{
135
-		.func = 6,
136
-		.phy_addr = 1,
137
-	},
138
-	{
139
-		.func = 7,
140
-		.phy_addr = 1,
141
-	},
142
-};
143
-
144
-static const struct stmmac_pci_dmi_data iot2040_stmmac_dmi_data = {
145
-	.func = iot2040_stmmac_func_data,
146
-	.nfuncs = ARRAY_SIZE(iot2040_stmmac_func_data),
147
-};
148
-
149
-static const struct dmi_system_id quark_pci_dmi[] = {
150
-	{
151
-		.matches = {
152
-			DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"),
153
-		},
154
-		.driver_data = (void *)&galileo_stmmac_dmi_data,
155
-	},
156
-	{
157
-		.matches = {
158
-			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
159
-		},
160
-		.driver_data = (void *)&galileo_stmmac_dmi_data,
161
-	},
162
-	/*
163
-	 * There are 2 types of SIMATIC IOT2000: IOT20202 and IOT2040.
164
-	 * The asset tag "6ES7647-0AA00-0YA2" is only for IOT2020 which
165
-	 * has only one pci network device while other asset tags are
166
-	 * for IOT2040 which has two.
167
-	 */
168
-	{
169
-		.matches = {
170
-			DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
171
-			DMI_EXACT_MATCH(DMI_BOARD_ASSET_TAG,
172
-					"6ES7647-0AA00-0YA2"),
173
-		},
174
-		.driver_data = (void *)&galileo_stmmac_dmi_data,
175
-	},
176
-	{
177
-		.matches = {
178
-			DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
179
-		},
180
-		.driver_data = (void *)&iot2040_stmmac_dmi_data,
181
-	},
182
-	{}
183
-};
184
-
185
-static int quark_default_data(struct pci_dev *pdev,
186
-			      struct plat_stmmacenet_data *plat)
72
+static int snps_gmac5_default_data(struct pci_dev *pdev,
73
+				   struct plat_stmmacenet_data *plat)
18774 {
188
-	int ret;
75
+	int i;
18976 
190
-	/* Set common default data first */
191
-	common_default_data(plat);
77
+	plat->clk_csr = 5;
78
+	plat->has_gmac4 = 1;
79
+	plat->force_sf_dma_mode = 1;
80
+	plat->tso_en = 1;
81
+	plat->pmt = 1;
19282 
193
-	/*
194
-	 * Refuse to load the driver and register net device if MAC controller
195
-	 * does not connect to any PHY interface.
196
-	 */
197
-	ret = stmmac_pci_find_phy_addr(pdev, quark_pci_dmi);
198
-	if (ret < 0) {
199
-		/* Return error to the caller on DMI enabled boards. */
200
-		if (dmi_get_system_info(DMI_BOARD_NAME))
201
-			return ret;
83
+	/* Set default value for multicast hash bins */
84
+	plat->multicast_filter_bins = HASH_TABLE_SIZE;
20285 
203
-		/*
204
-		 * Galileo boards with old firmware don't support DMI. We always
205
-		 * use 1 here as PHY address, so at least the first found MAC
206
-		 * controller would be probed.
207
-		 */
208
-		ret = 1;
86
+	/* Set default value for unicast filter entries */
87
+	plat->unicast_filter_entries = 1;
88
+
89
+	/* Set the maxmtu to a default of JUMBO_LEN */
90
+	plat->maxmtu = JUMBO_LEN;
91
+
92
+	/* Set default number of RX and TX queues to use */
93
+	plat->tx_queues_to_use = 4;
94
+	plat->rx_queues_to_use = 4;
95
+
96
+	plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
97
+	for (i = 0; i < plat->tx_queues_to_use; i++) {
98
+		plat->tx_queues_cfg[i].use_prio = false;
99
+		plat->tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;
100
+		plat->tx_queues_cfg[i].weight = 25;
101
+		if (i > 0)
102
+			plat->tx_queues_cfg[i].tbs_en = 1;
209103 	}
210104 
211
-	plat->bus_id = PCI_DEVID(pdev->bus->number, pdev->devfn);
212
-	plat->phy_addr = ret;
213
-	plat->interface = PHY_INTERFACE_MODE_RMII;
105
+	plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
106
+	for (i = 0; i < plat->rx_queues_to_use; i++) {
107
+		plat->rx_queues_cfg[i].use_prio = false;
108
+		plat->rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;
109
+		plat->rx_queues_cfg[i].pkt_route = 0x0;
110
+		plat->rx_queues_cfg[i].chan = i;
111
+	}
214112 
215
-	plat->dma_cfg->pbl = 16;
113
+	plat->bus_id = 1;
114
+	plat->phy_addr = -1;
115
+	plat->phy_interface = PHY_INTERFACE_MODE_GMII;
116
+
117
+	plat->dma_cfg->pbl = 32;
216118 	plat->dma_cfg->pblx8 = true;
217
-	plat->dma_cfg->fixed_burst = 1;
218
-	/* AXI (TODO) */
119
+
120
+	/* Axi Configuration */
121
+	plat->axi = devm_kzalloc(&pdev->dev, sizeof(*plat->axi), GFP_KERNEL);
122
+	if (!plat->axi)
123
+		return -ENOMEM;
124
+
125
+	plat->axi->axi_wr_osr_lmt = 31;
126
+	plat->axi->axi_rd_osr_lmt = 31;
127
+
128
+	plat->axi->axi_fb = false;
129
+	plat->axi->axi_blen[0] = 4;
130
+	plat->axi->axi_blen[1] = 8;
131
+	plat->axi->axi_blen[2] = 16;
132
+	plat->axi->axi_blen[3] = 32;
219133 
220134 	return 0;
221135 }
222136 
223
-static const struct stmmac_pci_info quark_pci_info = {
224
-	.setup = quark_default_data,
137
+static const struct stmmac_pci_info snps_gmac5_pci_info = {
138
+	.setup = snps_gmac5_default_data,
225139 };
226140 
227141 /**
....@@ -261,7 +175,7 @@
261175 		return -ENOMEM;
262176 
263177 	/* Enable pci device */
264
-	ret = pci_enable_device(pdev);
178
+	ret = pcim_enable_device(pdev);
265179 	if (ret) {
266180 		dev_err(&pdev->dev, "%s: ERROR: failed to enable device\n",
267181 			__func__);
....@@ -269,7 +183,7 @@
269183 	}
270184 
271185 	/* Get the base address of device */
272
-	for (i = 0; i <= PCI_STD_RESOURCE_END; i++) {
186
+	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
273187 		if (pci_resource_len(pdev, i) == 0)
274188 			continue;
275189 		ret = pcim_iomap_regions(pdev, BIT(i), pci_name(pdev));
....@@ -307,14 +221,12 @@
307221 
308222 	stmmac_dvr_remove(&pdev->dev);
309223 
310
-	for (i = 0; i <= PCI_STD_RESOURCE_END; i++) {
224
+	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
311225 		if (pci_resource_len(pdev, i) == 0)
312226 			continue;
313227 		pcim_iounmap_regions(pdev, BIT(i));
314228 		break;
315229 	}
316
-
317
-	pci_disable_device(pdev);
318230 }
319231 
320232 static int __maybe_unused stmmac_pci_suspend(struct device *dev)
....@@ -355,20 +267,15 @@
355267 static SIMPLE_DEV_PM_OPS(stmmac_pm_ops, stmmac_pci_suspend, stmmac_pci_resume);
356268 
357269 /* synthetic ID, no official vendor */
358
-#define PCI_VENDOR_ID_STMMAC 0x700
270
+#define PCI_VENDOR_ID_STMMAC		0x0700
359271 
360
-#define STMMAC_QUARK_ID  0x0937
361
-#define STMMAC_DEVICE_ID 0x1108
362
-
363
-#define STMMAC_DEVICE(vendor_id, dev_id, info)	{	\
364
-	PCI_VDEVICE(vendor_id, dev_id),			\
365
-	.driver_data = (kernel_ulong_t)&info		\
366
-	}
272
+#define PCI_DEVICE_ID_STMMAC_STMMAC		0x1108
273
+#define PCI_DEVICE_ID_SYNOPSYS_GMAC5_ID		0x7102
367274 
368275 static const struct pci_device_id stmmac_id_table[] = {
369
-	STMMAC_DEVICE(STMMAC, STMMAC_DEVICE_ID, stmmac_pci_info),
370
-	STMMAC_DEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_MAC, stmmac_pci_info),
371
-	STMMAC_DEVICE(INTEL, STMMAC_QUARK_ID, quark_pci_info),
276
+	{ PCI_DEVICE_DATA(STMMAC, STMMAC, &stmmac_pci_info) },
277
+	{ PCI_DEVICE_DATA(STMICRO, MAC, &stmmac_pci_info) },
278
+	{ PCI_DEVICE_DATA(SYNOPSYS, GMAC5_ID, &snps_gmac5_pci_info) },
372279 	{}
373280 };
374281