forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.h
....@@ -35,11 +35,17 @@
3535
3636 #ifdef CONFIG_MLX5_FPGA
3737
38
+#include <linux/mlx5/eq.h>
39
+
40
+#include "mlx5_core.h"
41
+#include "lib/eq.h"
3842 #include "fpga/cmd.h"
3943
4044 /* Represents an Innova device */
4145 struct mlx5_fpga_device {
4246 struct mlx5_core_dev *mdev;
47
+ struct mlx5_nb fpga_err_nb;
48
+ struct mlx5_nb fpga_qp_err_nb;
4349 spinlock_t state_lock; /* Protects state transitions */
4450 enum mlx5_fpga_status state;
4551 enum mlx5_fpga_image last_admin_image;
....@@ -57,32 +63,31 @@
5763 };
5864
5965 #define mlx5_fpga_dbg(__adev, format, ...) \
60
- dev_dbg(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
61
- __func__, __LINE__, current->pid, ##__VA_ARGS__)
66
+ mlx5_core_dbg((__adev)->mdev, "FPGA: %s:%d:(pid %d): " format, \
67
+ __func__, __LINE__, current->pid, ##__VA_ARGS__)
6268
6369 #define mlx5_fpga_err(__adev, format, ...) \
64
- dev_err(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
65
- __func__, __LINE__, current->pid, ##__VA_ARGS__)
70
+ mlx5_core_err((__adev)->mdev, "FPGA: %s:%d:(pid %d): " format, \
71
+ __func__, __LINE__, current->pid, ##__VA_ARGS__)
6672
6773 #define mlx5_fpga_warn(__adev, format, ...) \
68
- dev_warn(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
69
- __func__, __LINE__, current->pid, ##__VA_ARGS__)
74
+ mlx5_core_warn((__adev)->mdev, "FPGA: %s:%d:(pid %d): " format, \
75
+ __func__, __LINE__, current->pid, ##__VA_ARGS__)
7076
7177 #define mlx5_fpga_warn_ratelimited(__adev, format, ...) \
72
- dev_warn_ratelimited(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d: " \
73
- format, __func__, __LINE__, ##__VA_ARGS__)
78
+ mlx5_core_err_rl((__adev)->mdev, "FPGA: %s:%d: " \
79
+ format, __func__, __LINE__, ##__VA_ARGS__)
7480
7581 #define mlx5_fpga_notice(__adev, format, ...) \
76
- dev_notice(&(__adev)->mdev->pdev->dev, "FPGA: " format, ##__VA_ARGS__)
82
+ mlx5_core_info((__adev)->mdev, "FPGA: " format, ##__VA_ARGS__)
7783
7884 #define mlx5_fpga_info(__adev, format, ...) \
79
- dev_info(&(__adev)->mdev->pdev->dev, "FPGA: " format, ##__VA_ARGS__)
85
+ mlx5_core_info((__adev)->mdev, "FPGA: " format, ##__VA_ARGS__)
8086
8187 int mlx5_fpga_init(struct mlx5_core_dev *mdev);
8288 void mlx5_fpga_cleanup(struct mlx5_core_dev *mdev);
8389 int mlx5_fpga_device_start(struct mlx5_core_dev *mdev);
8490 void mlx5_fpga_device_stop(struct mlx5_core_dev *mdev);
85
-void mlx5_fpga_event(struct mlx5_core_dev *mdev, u8 event, void *data);
8691
8792 #else
8893
....@@ -101,11 +106,6 @@
101106 }
102107
103108 static inline void mlx5_fpga_device_stop(struct mlx5_core_dev *mdev)
104
-{
105
-}
106
-
107
-static inline void mlx5_fpga_event(struct mlx5_core_dev *mdev, u8 event,
108
- void *data)
109109 {
110110 }
111111