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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d

 kernel/drivers/mtd/nand/raw/tmio_nand.c
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@@ -103,7 +103,9 @@
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 /*--------------------------------------------------------------------------*/
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 struct tmio_nand {
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+	struct nand_controller controller;
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 	struct nand_chip chip;
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+	struct completion comp;
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 	struct platform_device *dev;
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111
 
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@@ -126,11 +128,10 @@
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128
 
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 /*--------------------------------------------------------------------------*/
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-static void tmio_nand_hwcontrol(struct mtd_info *mtd, int cmd,
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-				   unsigned int ctrl)
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+static void tmio_nand_hwcontrol(struct nand_chip *chip, int cmd,
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+				unsigned int ctrl)
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 {
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-	struct tmio_nand *tmio = mtd_to_tmio(mtd);
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-	struct nand_chip *chip = mtd_to_nand(mtd);
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+	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip));
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 	if (ctrl & NAND_CTRL_CHANGE) {
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 		u8 mode;
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@@ -156,12 +157,12 @@
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 	}
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 	if (cmd != NAND_CMD_NONE)
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-		tmio_iowrite8(cmd, chip->IO_ADDR_W);
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+		tmio_iowrite8(cmd, chip->legacy.IO_ADDR_W);
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 }
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-static int tmio_nand_dev_ready(struct mtd_info *mtd)
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+static int tmio_nand_dev_ready(struct nand_chip *chip)
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 {
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-	struct tmio_nand *tmio = mtd_to_tmio(mtd);
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+	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip));
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 	return !(tmio_ioread8(tmio->fcr + FCR_STATUS) & FCR_STATUS_BUSY);
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 }
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@@ -169,15 +170,11 @@
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 static irqreturn_t tmio_irq(int irq, void *__tmio)
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 {
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 	struct tmio_nand *tmio = __tmio;
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-	struct nand_chip *nand_chip = &tmio->chip;
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 	/* disable RDYREQ interrupt */
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 	tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
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+	complete(&tmio->comp);
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-	if (unlikely(!waitqueue_active(&nand_chip->controller->wq)))
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-		dev_warn(&tmio->dev->dev, "spurious interrupt\n");
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-
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-	wake_up(&nand_chip->controller->wq);
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 	return IRQ_HANDLED;
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 }
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@@ -187,26 +184,25 @@
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   *erase and write, we enable it to wake us up.  The irq handler
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   *disables the interrupt.
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  */
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-static int
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-tmio_nand_wait(struct mtd_info *mtd, struct nand_chip *nand_chip)
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+static int tmio_nand_wait(struct nand_chip *nand_chip)
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 {
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-	struct tmio_nand *tmio = mtd_to_tmio(mtd);
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+	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(nand_chip));
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 	long timeout;
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 	u8 status;
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192
 
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 	/* enable RDYREQ interrupt */
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+
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 	tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR);
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+	reinit_completion(&tmio->comp);
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 	tmio_iowrite8(0x81, tmio->fcr + FCR_IMR);
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-	timeout = wait_event_timeout(nand_chip->controller->wq,
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-		tmio_nand_dev_ready(mtd),
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-		msecs_to_jiffies(nand_chip->state == FL_ERASING ? 400 : 20));
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+	timeout = 400;
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+	timeout = wait_for_completion_timeout(&tmio->comp,
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+					      msecs_to_jiffies(timeout));
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202
 
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-	if (unlikely(!tmio_nand_dev_ready(mtd))) {
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+	if (unlikely(!tmio_nand_dev_ready(nand_chip))) {
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 		tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
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-		dev_warn(&tmio->dev->dev, "still busy with %s after %d ms\n",
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-			nand_chip->state == FL_ERASING ? "erase" : "program",
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-			nand_chip->state == FL_ERASING ? 400 : 20);
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+		dev_warn(&tmio->dev->dev, "still busy after 400 ms\n");
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 	} else if (unlikely(!timeout)) {
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 		tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
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@@ -225,9 +221,9 @@
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   *To prevent stale data from being read, tmio_nand_hwcontrol() clears
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   *tmio->read_good.
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  */
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-static u_char tmio_nand_read_byte(struct mtd_info *mtd)
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+static u_char tmio_nand_read_byte(struct nand_chip *chip)
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 {
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-	struct tmio_nand *tmio = mtd_to_tmio(mtd);
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+	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip));
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 	unsigned int data;
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228
 
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 	if (tmio->read_good--)
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@@ -245,33 +241,33 @@
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   *buffer functions.
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  */
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 static void
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-tmio_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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+tmio_nand_write_buf(struct nand_chip *chip, const u_char *buf, int len)
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 {
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-	struct tmio_nand *tmio = mtd_to_tmio(mtd);
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+	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip));
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247
 
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 	tmio_iowrite16_rep(tmio->fcr + FCR_DATA, buf, len >> 1);
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 }
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-static void tmio_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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+static void tmio_nand_read_buf(struct nand_chip *chip, u_char *buf, int len)
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 {
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-	struct tmio_nand *tmio = mtd_to_tmio(mtd);
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+	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip));
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254
 
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 	tmio_ioread16_rep(tmio->fcr + FCR_DATA, buf, len >> 1);
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 }
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-static void tmio_nand_enable_hwecc(struct mtd_info *mtd, int mode)
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+static void tmio_nand_enable_hwecc(struct nand_chip *chip, int mode)
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 {
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-	struct tmio_nand *tmio = mtd_to_tmio(mtd);
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+	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip));
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261
 
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 	tmio_iowrite8(FCR_MODE_HWECC_RESET, tmio->fcr + FCR_MODE);
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 	tmio_ioread8(tmio->fcr + FCR_DATA);	/* dummy read */
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 	tmio_iowrite8(FCR_MODE_HWECC_CALC, tmio->fcr + FCR_MODE);
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 }
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-static int tmio_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
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-							u_char *ecc_code)
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+static int tmio_nand_calculate_ecc(struct nand_chip *chip, const u_char *dat,
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+				   u_char *ecc_code)
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 {
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-	struct tmio_nand *tmio = mtd_to_tmio(mtd);
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+	struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(chip));
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 	unsigned int ecc;
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272
 
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 	tmio_iowrite8(FCR_MODE_HWECC_RESULT, tmio->fcr + FCR_MODE);
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@@ -290,16 +286,18 @@
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 	return 0;
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 }
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-static int tmio_nand_correct_data(struct mtd_info *mtd, unsigned char *buf,
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-		unsigned char *read_ecc, unsigned char *calc_ecc)
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+static int tmio_nand_correct_data(struct nand_chip *chip, unsigned char *buf,
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+				  unsigned char *read_ecc,
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+				  unsigned char *calc_ecc)
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 {
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 	int r0, r1;
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 	/* assume ecc.size = 512 and ecc.bytes = 6 */
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-	r0 = __nand_correct_data(buf, read_ecc, calc_ecc, 256);
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+	r0 = __nand_correct_data(buf, read_ecc, calc_ecc, 256, false);
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 	if (r0 < 0)
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 		return r0;
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-	r1 = __nand_correct_data(buf + 256, read_ecc + 3, calc_ecc + 3, 256);
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+	r1 = __nand_correct_data(buf + 256, read_ecc + 3, calc_ecc + 3, 256,
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+				 false);
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 	if (r1 < 0)
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 		return r1;
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 	return r0 + r1;
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@@ -358,6 +356,25 @@
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 		cell->disable(dev);
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 }
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358
 
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+static int tmio_attach_chip(struct nand_chip *chip)
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+{
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+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
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+		return 0;
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+
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+	chip->ecc.size = 512;
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+	chip->ecc.bytes = 6;
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+	chip->ecc.strength = 2;
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+	chip->ecc.hwctl = tmio_nand_enable_hwecc;
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+	chip->ecc.calculate = tmio_nand_calculate_ecc;
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+	chip->ecc.correct = tmio_nand_correct_data;
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+
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+	return 0;
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+}
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+
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+static const struct nand_controller_ops tmio_ops = {
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+	.attach_chip = tmio_attach_chip,
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+};
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+
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 static int tmio_probe(struct platform_device *dev)
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 {
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 	struct tmio_nand_data *data = dev_get_platdata(&dev->dev);
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@@ -378,6 +395,8 @@
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 	if (!tmio)
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 		return -ENOMEM;
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+	init_completion(&tmio->comp);
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+
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 	tmio->dev = dev;
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 	platform_set_drvdata(dev, tmio);
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@@ -385,6 +404,10 @@
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 	mtd = nand_to_mtd(nand_chip);
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 	mtd->name = "tmio-nand";
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 	mtd->dev.parent = &dev->dev;
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+
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+	nand_controller_init(&tmio->controller);
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+	tmio->controller.ops = &tmio_ops;
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+	nand_chip->controller = &tmio->controller;
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 	tmio->ccr = devm_ioremap(&dev->dev, ccr->start, resource_size(ccr));
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 	if (!tmio->ccr)
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@@ -400,30 +423,21 @@
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 		return retval;
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 	/* Set address of NAND IO lines */
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-	nand_chip->IO_ADDR_R = tmio->fcr;
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-	nand_chip->IO_ADDR_W = tmio->fcr;
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+	nand_chip->legacy.IO_ADDR_R = tmio->fcr;
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+	nand_chip->legacy.IO_ADDR_W = tmio->fcr;
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 	/* Set address of hardware control function */
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-	nand_chip->cmd_ctrl = tmio_nand_hwcontrol;
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-	nand_chip->dev_ready = tmio_nand_dev_ready;
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-	nand_chip->read_byte = tmio_nand_read_byte;
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-	nand_chip->write_buf = tmio_nand_write_buf;
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-	nand_chip->read_buf = tmio_nand_read_buf;
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-
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-	/* set eccmode using hardware ECC */
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-	nand_chip->ecc.mode = NAND_ECC_HW;
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-	nand_chip->ecc.size = 512;
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-	nand_chip->ecc.bytes = 6;
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-	nand_chip->ecc.strength = 2;
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-	nand_chip->ecc.hwctl = tmio_nand_enable_hwecc;
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-	nand_chip->ecc.calculate = tmio_nand_calculate_ecc;
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-	nand_chip->ecc.correct = tmio_nand_correct_data;
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+	nand_chip->legacy.cmd_ctrl = tmio_nand_hwcontrol;
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+	nand_chip->legacy.dev_ready = tmio_nand_dev_ready;
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+	nand_chip->legacy.read_byte = tmio_nand_read_byte;
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+	nand_chip->legacy.write_buf = tmio_nand_write_buf;
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+	nand_chip->legacy.read_buf = tmio_nand_read_buf;
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 	if (data)
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 		nand_chip->badblock_pattern = data->badblock_pattern;
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 	/* 15 us command delay time */
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-	nand_chip->chip_delay = 15;
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+	nand_chip->legacy.chip_delay = 15;
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 	retval = devm_request_irq(&dev->dev, irq, &tmio_irq, 0,
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 				  dev_name(&dev->dev), tmio);
..
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@@ -433,7 +447,7 @@
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 	}
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448
 
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 	tmio->irq = irq;
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-	nand_chip->waitfunc = tmio_nand_wait;
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+	nand_chip->legacy.waitfunc = tmio_nand_wait;
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 	/* Scan to find existence of the device */
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 	retval = nand_scan(nand_chip, 1);
..
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@@ -459,8 +473,12 @@
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 static int tmio_remove(struct platform_device *dev)
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 {
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 	struct tmio_nand *tmio = platform_get_drvdata(dev);
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+	struct nand_chip *chip = &tmio->chip;
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+	int ret;
462
478
 
463
-	nand_release(&tmio->chip);
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+	ret = mtd_device_unregister(nand_to_mtd(chip));
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+	WARN_ON(ret);
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+	nand_cleanup(chip);
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 	tmio_hw_stop(dev, tmio);
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 	return 0;
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 }