forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d 
 kernel/drivers/gpu/drm/stm/ltdc.c
....@@ -10,19 +10,28 @@
1010 
1111 #include <linux/clk.h>
1212 #include <linux/component.h>
13
+#include <linux/delay.h>
14
+#include <linux/interrupt.h>
15
+#include <linux/module.h>
1316 #include <linux/of_address.h>
1417 #include <linux/of_graph.h>
18
+#include <linux/pinctrl/consumer.h>
19
+#include <linux/platform_device.h>
20
+#include <linux/pm_runtime.h>
1521 #include <linux/reset.h>
1622 
1723 #include <drm/drm_atomic.h>
1824 #include <drm/drm_atomic_helper.h>
19
-#include <drm/drm_crtc_helper.h>
25
+#include <drm/drm_bridge.h>
26
+#include <drm/drm_device.h>
2027 #include <drm/drm_fb_cma_helper.h>
28
+#include <drm/drm_fourcc.h>
2129 #include <drm/drm_gem_cma_helper.h>
2230 #include <drm/drm_gem_framebuffer_helper.h>
2331 #include <drm/drm_of.h>
24
-#include <drm/drm_bridge.h>
2532 #include <drm/drm_plane_helper.h>
33
+#include <drm/drm_probe_helper.h>
34
+#include <drm/drm_vblank.h>
2635 
2736 #include <video/videomode.h>
2837 
....@@ -32,8 +41,6 @@
3241 #define CRTC_MASK GENMASK(NB_CRTC - 1, 0)
3342 
3443 #define MAX_IRQ 4
35
-
36
-#define MAX_ENDPOINTS 2
3744 
3845 #define HWVER_10200 0x010200
3946 #define HWVER_10300 0x010300
....@@ -149,6 +156,8 @@
149156 #define IER_TERRIE	BIT(2)		/* Transfer ERRor Interrupt Enable */
150157 #define IER_RRIE	BIT(3)		/* Register Reload Interrupt enable */
151158 
159
+#define CPSR_CYPOS	GENMASK(15, 0)	/* Current Y position */
160
+
152161 #define ISR_LIF		BIT(0)		/* Line Interrupt Flag */
153162 #define ISR_FUIF	BIT(1)		/* Fifo Underrun Interrupt Flag */
154163 #define ISR_TERRIF	BIT(2)		/* Transfer ERRor Interrupt Flag */
....@@ -222,6 +231,11 @@
222231 	PF_L8,			/* 0x05 */
223232 	PF_ARGB1555,		/* 0x06 */
224233 	PF_ARGB4444		/* 0x07 */
234
+};
235
+
236
+static const u64 ltdc_format_modifiers[] = {
237
+	DRM_FORMAT_MOD_LINEAR,
238
+	DRM_FORMAT_MOD_INVALID
225239 };
226240 
227241 static inline u32 reg_read(void __iomem *base, u32 reg)
....@@ -409,8 +423,11 @@
409423 				    struct drm_crtc_state *old_state)
410424 {
411425 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);
426
+	struct drm_device *ddev = crtc->dev;
412427 
413428 	DRM_DEBUG_DRIVER("\n");
429
+
430
+	pm_runtime_get_sync(ddev->dev);
414431 
415432 	/* Sets the background color value */
416433 	reg_write(ldev->regs, LTDC_BCCR, BCCR_BCBLACK);
....@@ -418,11 +435,8 @@
418435 	/* Enable IRQ */
419436 	reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE);
420437 
421
-	/* Immediately commit the planes */
422
-	reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR);
423
-
424
-	/* Enable LTDC */
425
-	reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN);
438
+	/* Commit shadow registers = update planes at next vblank */
439
+	reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR);
426440 
427441 	drm_crtc_vblank_on(crtc);
428442 }
....@@ -431,19 +445,19 @@
431445 				     struct drm_crtc_state *old_state)
432446 {
433447 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);
448
+	struct drm_device *ddev = crtc->dev;
434449 
435450 	DRM_DEBUG_DRIVER("\n");
436451 
437452 	drm_crtc_vblank_off(crtc);
438
-
439
-	/* disable LTDC */
440
-	reg_clear(ldev->regs, LTDC_GCR, GCR_LTDCEN);
441453 
442454 	/* disable IRQ */
443455 	reg_clear(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE);
444456 
445457 	/* immediately commit disable of layers before switching off LTDC */
446458 	reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR);
459
+
460
+	pm_runtime_put_sync(ddev->dev);
447461 }
448462 
449463 #define CLK_TOLERANCE_HZ 50
....@@ -494,19 +508,15 @@
494508 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);
495509 	int rate = mode->clock * 1000;
496510 
497
-	/*
498
-	 * TODO clk_round_rate() does not work yet. When ready, it can
499
-	 * be used instead of clk_set_rate() then clk_get_rate().
500
-	 */
501
-
502
-	clk_disable(ldev->pixel_clk);
503511 	if (clk_set_rate(ldev->pixel_clk, rate) < 0) {
504512 		DRM_ERROR("Cannot set rate (%dHz) for pixel clk\n", rate);
505513 		return false;
506514 	}
507
-	clk_enable(ldev->pixel_clk);
508515 
509516 	adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000;
517
+
518
+	DRM_DEBUG_DRIVER("requested clock %dkHz, adjusted clock %dkHz\n",
519
+			 mode->clock, adjusted_mode->clock);
510520 
511521 	return true;
512522 }
....@@ -514,11 +524,54 @@
514524 static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
515525 {
516526 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);
527
+	struct drm_device *ddev = crtc->dev;
528
+	struct drm_connector_list_iter iter;
529
+	struct drm_connector *connector = NULL;
530
+	struct drm_encoder *encoder = NULL, *en_iter;
531
+	struct drm_bridge *bridge = NULL, *br_iter;
517532 	struct drm_display_mode *mode = &crtc->state->adjusted_mode;
518533 	struct videomode vm;
519534 	u32 hsync, vsync, accum_hbp, accum_vbp, accum_act_w, accum_act_h;
520535 	u32 total_width, total_height;
536
+	u32 bus_flags = 0;
521537 	u32 val;
538
+	int ret;
539
+
540
+	/* get encoder from crtc */
541
+	drm_for_each_encoder(en_iter, ddev)
542
+		if (en_iter->crtc == crtc) {
543
+			encoder = en_iter;
544
+			break;
545
+		}
546
+
547
+	if (encoder) {
548
+		/* get bridge from encoder */
549
+		list_for_each_entry(br_iter, &encoder->bridge_chain, chain_node)
550
+			if (br_iter->encoder == encoder) {
551
+				bridge = br_iter;
552
+				break;
553
+			}
554
+
555
+		/* Get the connector from encoder */
556
+		drm_connector_list_iter_begin(ddev, &iter);
557
+		drm_for_each_connector_iter(connector, &iter)
558
+			if (connector->encoder == encoder)
559
+				break;
560
+		drm_connector_list_iter_end(&iter);
561
+	}
562
+
563
+	if (bridge && bridge->timings)
564
+		bus_flags = bridge->timings->input_bus_flags;
565
+	else if (connector)
566
+		bus_flags = connector->display_info.bus_flags;
567
+
568
+	if (!pm_runtime_active(ddev->dev)) {
569
+		ret = pm_runtime_get_sync(ddev->dev);
570
+		if (ret) {
571
+			DRM_ERROR("Failed to set mode, cannot get sync\n");
572
+			return;
573
+		}
574
+	}
522575 
523576 	drm_display_mode_to_videomode(mode, &vm);
524577 
....@@ -547,10 +600,10 @@
547600 	if (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH)
548601 		val |= GCR_VSPOL;
549602 
550
-	if (vm.flags & DISPLAY_FLAGS_DE_HIGH)
603
+	if (bus_flags & DRM_BUS_FLAG_DE_LOW)
551604 		val |= GCR_DEPOL;
552605 
553
-	if (vm.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
606
+	if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
554607 		val |= GCR_PCPOL;
555608 
556609 	reg_update_bits(ldev->regs, LTDC_GCR,
....@@ -579,6 +632,7 @@
579632 				   struct drm_crtc_state *old_crtc_state)
580633 {
581634 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);
635
+	struct drm_device *ddev = crtc->dev;
582636 	struct drm_pending_vblank_event *event = crtc->state->event;
583637 
584638 	DRM_DEBUG_ATOMIC("\n");
....@@ -591,13 +645,62 @@
591645 	if (event) {
592646 		crtc->state->event = NULL;
593647 
594
-		spin_lock_irq(&crtc->dev->event_lock);
648
+		spin_lock_irq(&ddev->event_lock);
595649 		if (drm_crtc_vblank_get(crtc) == 0)
596650 			drm_crtc_arm_vblank_event(crtc, event);
597651 		else
598652 			drm_crtc_send_vblank_event(crtc, event);
599
-		spin_unlock_irq(&crtc->dev->event_lock);
653
+		spin_unlock_irq(&ddev->event_lock);
600654 	}
655
+}
656
+
657
+static bool ltdc_crtc_get_scanout_position(struct drm_crtc *crtc,
658
+					   bool in_vblank_irq,
659
+					   int *vpos, int *hpos,
660
+					   ktime_t *stime, ktime_t *etime,
661
+					   const struct drm_display_mode *mode)
662
+{
663
+	struct drm_device *ddev = crtc->dev;
664
+	struct ltdc_device *ldev = ddev->dev_private;
665
+	int line, vactive_start, vactive_end, vtotal;
666
+
667
+	if (stime)
668
+		*stime = ktime_get();
669
+
670
+	/* The active area starts after vsync + front porch and ends
671
+	 * at vsync + front porc + display size.
672
+	 * The total height also include back porch.
673
+	 * We have 3 possible cases to handle:
674
+	 * - line < vactive_start: vpos = line - vactive_start and will be
675
+	 * negative
676
+	 * - vactive_start < line < vactive_end: vpos = line - vactive_start
677
+	 * and will be positive
678
+	 * - line > vactive_end: vpos = line - vtotal - vactive_start
679
+	 * and will negative
680
+	 *
681
+	 * Computation for the two first cases are identical so we can
682
+	 * simplify the code and only test if line > vactive_end
683
+	 */
684
+	if (pm_runtime_active(ddev->dev)) {
685
+		line = reg_read(ldev->regs, LTDC_CPSR) & CPSR_CYPOS;
686
+		vactive_start = reg_read(ldev->regs, LTDC_BPCR) & BPCR_AVBP;
687
+		vactive_end = reg_read(ldev->regs, LTDC_AWCR) & AWCR_AAH;
688
+		vtotal = reg_read(ldev->regs, LTDC_TWCR) & TWCR_TOTALH;
689
+
690
+		if (line > vactive_end)
691
+			*vpos = line - vtotal - vactive_start;
692
+		else
693
+			*vpos = line - vactive_start;
694
+	} else {
695
+		*vpos = 0;
696
+	}
697
+
698
+	*hpos = 0;
699
+
700
+	if (etime)
701
+		*etime = ktime_get();
702
+
703
+	return true;
601704 }
602705 
603706 static const struct drm_crtc_helper_funcs ltdc_crtc_helper_funcs = {
....@@ -607,14 +710,20 @@
607710 	.atomic_flush = ltdc_crtc_atomic_flush,
608711 	.atomic_enable = ltdc_crtc_atomic_enable,
609712 	.atomic_disable = ltdc_crtc_atomic_disable,
713
+	.get_scanout_position = ltdc_crtc_get_scanout_position,
610714 };
611715 
612716 static int ltdc_crtc_enable_vblank(struct drm_crtc *crtc)
613717 {
614718 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);
719
+	struct drm_crtc_state *state = crtc->state;
615720 
616721 	DRM_DEBUG_DRIVER("\n");
617
-	reg_set(ldev->regs, LTDC_IER, IER_LIE);
722
+
723
+	if (state->enable)
724
+		reg_set(ldev->regs, LTDC_IER, IER_LIE);
725
+	else
726
+		return -EPERM;
618727 
619728 	return 0;
620729 }
....@@ -636,6 +745,7 @@
636745 	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
637746 	.enable_vblank = ltdc_crtc_enable_vblank,
638747 	.disable_vblank = ltdc_crtc_disable_vblank,
748
+	.get_vblank_timestamp = drm_crtc_vblank_helper_get_vblank_timestamp,
639749 	.gamma_set = drm_atomic_helper_legacy_gamma_set,
640750 };
641751 
....@@ -647,7 +757,7 @@
647757 				   struct drm_plane_state *state)
648758 {
649759 	struct drm_framebuffer *fb = state->fb;
650
-	u32 src_x, src_y, src_w, src_h;
760
+	u32 src_w, src_h;
651761 
652762 	DRM_DEBUG_DRIVER("\n");
653763 
....@@ -655,8 +765,6 @@
655765 		return 0;
656766 
657767 	/* convert src_ from 16:16 format */
658
-	src_x = state->src_x >> 16;
659
-	src_y = state->src_y >> 16;
660768 	src_w = state->src_w >> 16;
661769 	src_h = state->src_h >> 16;
662770 
....@@ -730,7 +838,7 @@
730838 
731839 	/* Configures the color frame buffer pitch in bytes & line length */
732840 	pitch_in_bytes = fb->pitches[0];
733
-	line_length = drm_format_plane_cpp(fb->format->format, 0) *
841
+	line_length = fb->format->cpp[0] *
734842 		      (x1 - x0 + 1) + (ldev->caps.bus_width >> 3) - 1;
735843 	val = ((pitch_in_bytes << 16) | line_length);
736844 	reg_update_bits(ldev->regs, LTDC_L1CFBLR + lofs,
....@@ -773,11 +881,11 @@
773881 
774882 	mutex_lock(&ldev->err_lock);
775883 	if (ldev->error_status & ISR_FUIF) {
776
-		DRM_DEBUG_DRIVER("Fifo underrun\n");
884
+		DRM_WARN("ltdc fifo underrun: please verify display mode\n");
777885 		ldev->error_status &= ~ISR_FUIF;
778886 	}
779887 	if (ldev->error_status & ISR_TERRIF) {
780
-		DRM_DEBUG_DRIVER("Transfer error\n");
888
+		DRM_WARN("ltdc transfer error\n");
781889 		ldev->error_status &= ~ISR_TERRIF;
782890 	}
783891 	mutex_unlock(&ldev->err_lock);
....@@ -815,6 +923,16 @@
815923 	fpsi->counter = 0;
816924 }
817925 
926
+static bool ltdc_plane_format_mod_supported(struct drm_plane *plane,
927
+					    u32 format,
928
+					    u64 modifier)
929
+{
930
+	if (modifier == DRM_FORMAT_MOD_LINEAR)
931
+		return true;
932
+
933
+	return false;
934
+}
935
+
818936 static const struct drm_plane_funcs ltdc_plane_funcs = {
819937 	.update_plane = drm_atomic_helper_update_plane,
820938 	.disable_plane = drm_atomic_helper_disable_plane,
....@@ -823,6 +941,7 @@
823941 	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
824942 	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
825943 	.atomic_print_state = ltdc_plane_atomic_print_state,
944
+	.format_mod_supported = ltdc_plane_format_mod_supported,
826945 };
827946 
828947 static const struct drm_plane_helper_funcs ltdc_plane_helper_funcs = {
....@@ -842,6 +961,7 @@
842961 	unsigned int i, nb_fmt = 0;
843962 	u32 formats[NB_PF * 2];
844963 	u32 drm_fmt, drm_fmt_no_alpha;
964
+	const u64 *modifiers = ltdc_format_modifiers;
845965 	int ret;
846966 
847967 	/* Get supported pixel formats */
....@@ -870,7 +990,7 @@
870990 
871991 	ret = drm_universal_plane_init(ddev, plane, possible_crtcs,
872992 				       &ltdc_plane_funcs, formats, nb_fmt,
873
-				       NULL, type, NULL);
993
+				       modifiers, type, NULL);
874994 	if (ret < 0)
875995 		return NULL;
876996 
....@@ -942,6 +1062,54 @@
9421062 	.destroy = drm_encoder_cleanup,
9431063 };
9441064 
1065
+static void ltdc_encoder_disable(struct drm_encoder *encoder)
1066
+{
1067
+	struct drm_device *ddev = encoder->dev;
1068
+	struct ltdc_device *ldev = ddev->dev_private;
1069
+
1070
+	DRM_DEBUG_DRIVER("\n");
1071
+
1072
+	/* Disable LTDC */
1073
+	reg_clear(ldev->regs, LTDC_GCR, GCR_LTDCEN);
1074
+
1075
+	/* Set to sleep state the pinctrl whatever type of encoder */
1076
+	pinctrl_pm_select_sleep_state(ddev->dev);
1077
+}
1078
+
1079
+static void ltdc_encoder_enable(struct drm_encoder *encoder)
1080
+{
1081
+	struct drm_device *ddev = encoder->dev;
1082
+	struct ltdc_device *ldev = ddev->dev_private;
1083
+
1084
+	DRM_DEBUG_DRIVER("\n");
1085
+
1086
+	/* Enable LTDC */
1087
+	reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN);
1088
+}
1089
+
1090
+static void ltdc_encoder_mode_set(struct drm_encoder *encoder,
1091
+				  struct drm_display_mode *mode,
1092
+				  struct drm_display_mode *adjusted_mode)
1093
+{
1094
+	struct drm_device *ddev = encoder->dev;
1095
+
1096
+	DRM_DEBUG_DRIVER("\n");
1097
+
1098
+	/*
1099
+	 * Set to default state the pinctrl only with DPI type.
1100
+	 * Others types like DSI, don't need pinctrl due to
1101
+	 * internal bridge (the signals do not come out of the chipset).
1102
+	 */
1103
+	if (encoder->encoder_type == DRM_MODE_ENCODER_DPI)
1104
+		pinctrl_pm_select_default_state(ddev->dev);
1105
+}
1106
+
1107
+static const struct drm_encoder_helper_funcs ltdc_encoder_helper_funcs = {
1108
+	.disable = ltdc_encoder_disable,
1109
+	.enable = ltdc_encoder_enable,
1110
+	.mode_set = ltdc_encoder_mode_set,
1111
+};
1112
+
9451113 static int ltdc_encoder_init(struct drm_device *ddev, struct drm_bridge *bridge)
9461114 {
9471115 	struct drm_encoder *encoder;
....@@ -957,7 +1125,9 @@
9571125 	drm_encoder_init(ddev, encoder, &ltdc_encoder_funcs,
9581126 			 DRM_MODE_ENCODER_DPI, NULL);
9591127 
960
-	ret = drm_bridge_attach(encoder, bridge, NULL);
1128
+	drm_encoder_helper_add(encoder, &ltdc_encoder_helper_funcs);
1129
+
1130
+	ret = drm_bridge_attach(encoder, bridge, NULL, 0);
9611131 	if (ret) {
9621132 		drm_encoder_cleanup(encoder);
9631133 		return -EINVAL;
....@@ -973,10 +1143,13 @@
9731143 	struct ltdc_device *ldev = ddev->dev_private;
9741144 	u32 bus_width_log2, lcr, gc2r;
9751145 
976
-	/* at least 1 layer must be managed */
1146
+	/*
1147
+	 * at least 1 layer must be managed & the number of layers
1148
+	 * must not exceed LTDC_MAX_LAYER
1149
+	 */
9771150 	lcr = reg_read(ldev->regs, LTDC_LCR);
9781151 
979
-	ldev->caps.nb_layers = max_t(int, lcr, 1);
1152
+	ldev->caps.nb_layers = clamp((int)lcr, 1, LTDC_MAX_LAYER);
9801153 
9811154 	/* set data bus width */
9821155 	gc2r = reg_read(ldev->regs, LTDC_GC2R);
....@@ -1000,15 +1173,41 @@
10001173 		ldev->caps.pad_max_freq_hz = 90000000;
10011174 		if (ldev->caps.hw_version == HWVER_10200)
10021175 			ldev->caps.pad_max_freq_hz = 65000000;
1176
+		ldev->caps.nb_irq = 2;
10031177 		break;
10041178 	case HWVER_20101:
10051179 		ldev->caps.reg_ofs = REG_OFS_4;
10061180 		ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1;
10071181 		ldev->caps.non_alpha_only_l1 = false;
10081182 		ldev->caps.pad_max_freq_hz = 150000000;
1183
+		ldev->caps.nb_irq = 4;
10091184 		break;
10101185 	default:
10111186 		return -ENODEV;
1187
+	}
1188
+
1189
+	return 0;
1190
+}
1191
+
1192
+void ltdc_suspend(struct drm_device *ddev)
1193
+{
1194
+	struct ltdc_device *ldev = ddev->dev_private;
1195
+
1196
+	DRM_DEBUG_DRIVER("\n");
1197
+	clk_disable_unprepare(ldev->pixel_clk);
1198
+}
1199
+
1200
+int ltdc_resume(struct drm_device *ddev)
1201
+{
1202
+	struct ltdc_device *ldev = ddev->dev_private;
1203
+	int ret;
1204
+
1205
+	DRM_DEBUG_DRIVER("\n");
1206
+
1207
+	ret = clk_prepare_enable(ldev->pixel_clk);
1208
+	if (ret) {
1209
+		DRM_ERROR("failed to enable pixel clock (%d)\n", ret);
1210
+		return ret;
10121211 	}
10131212 
10141213 	return 0;
....@@ -1020,46 +1219,74 @@
10201219 	struct ltdc_device *ldev = ddev->dev_private;
10211220 	struct device *dev = ddev->dev;
10221221 	struct device_node *np = dev->of_node;
1023
-	struct drm_bridge *bridge[MAX_ENDPOINTS] = {NULL};
1024
-	struct drm_panel *panel[MAX_ENDPOINTS] = {NULL};
1222
+	struct drm_bridge *bridge;
1223
+	struct drm_panel *panel;
10251224 	struct drm_crtc *crtc;
10261225 	struct reset_control *rstc;
10271226 	struct resource *res;
1028
-	int irq, ret, i, endpoint_not_ready = -ENODEV;
1227
+	int irq, i, nb_endpoints;
1228
+	int ret = -ENODEV;
10291229 
10301230 	DRM_DEBUG_DRIVER("\n");
10311231 
1032
-	/* Get endpoints if any */
1033
-	for (i = 0; i < MAX_ENDPOINTS; i++) {
1034
-		ret = drm_of_find_panel_or_bridge(np, 0, i, &panel[i],
1035
-						  &bridge[i]);
1036
-
1037
-		/*
1038
-		 * If at least one endpoint is -EPROBE_DEFER, defer probing,
1039
-		 * else if at least one endpoint is ready, continue probing.
1040
-		 */
1041
-		if (ret == -EPROBE_DEFER)
1042
-			return ret;
1043
-		else if (!ret)
1044
-			endpoint_not_ready = 0;
1045
-	}
1046
-
1047
-	if (endpoint_not_ready)
1048
-		return endpoint_not_ready;
1049
-
1050
-	rstc = devm_reset_control_get_exclusive(dev, NULL);
1051
-
1052
-	mutex_init(&ldev->err_lock);
1232
+	/* Get number of endpoints */
1233
+	nb_endpoints = of_graph_get_endpoint_count(np);
1234
+	if (!nb_endpoints)
1235
+		return -ENODEV;
10531236 
10541237 	ldev->pixel_clk = devm_clk_get(dev, "lcd");
10551238 	if (IS_ERR(ldev->pixel_clk)) {
1056
-		DRM_ERROR("Unable to get lcd clock\n");
1057
-		return -ENODEV;
1239
+		if (PTR_ERR(ldev->pixel_clk) != -EPROBE_DEFER)
1240
+			DRM_ERROR("Unable to get lcd clock\n");
1241
+		return PTR_ERR(ldev->pixel_clk);
10581242 	}
10591243 
10601244 	if (clk_prepare_enable(ldev->pixel_clk)) {
10611245 		DRM_ERROR("Unable to prepare pixel clock\n");
10621246 		return -ENODEV;
1247
+	}
1248
+
1249
+	/* Get endpoints if any */
1250
+	for (i = 0; i < nb_endpoints; i++) {
1251
+		ret = drm_of_find_panel_or_bridge(np, 0, i, &panel, &bridge);
1252
+
1253
+		/*
1254
+		 * If at least one endpoint is -ENODEV, continue probing,
1255
+		 * else if at least one endpoint returned an error
1256
+		 * (ie -EPROBE_DEFER) then stop probing.
1257
+		 */
1258
+		if (ret == -ENODEV)
1259
+			continue;
1260
+		else if (ret)
1261
+			goto err;
1262
+
1263
+		if (panel) {
1264
+			bridge = drm_panel_bridge_add_typed(panel,
1265
+							    DRM_MODE_CONNECTOR_DPI);
1266
+			if (IS_ERR(bridge)) {
1267
+				DRM_ERROR("panel-bridge endpoint %d\n", i);
1268
+				ret = PTR_ERR(bridge);
1269
+				goto err;
1270
+			}
1271
+		}
1272
+
1273
+		if (bridge) {
1274
+			ret = ltdc_encoder_init(ddev, bridge);
1275
+			if (ret) {
1276
+				DRM_ERROR("init encoder endpoint %d\n", i);
1277
+				goto err;
1278
+			}
1279
+		}
1280
+	}
1281
+
1282
+	rstc = devm_reset_control_get_exclusive(dev, NULL);
1283
+
1284
+	mutex_init(&ldev->err_lock);
1285
+
1286
+	if (!IS_ERR(rstc)) {
1287
+		reset_control_assert(rstc);
1288
+		usleep_range(10, 20);
1289
+		reset_control_deassert(rstc);
10631290 	}
10641291 
10651292 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
....@@ -1068,26 +1295,6 @@
10681295 		DRM_ERROR("Unable to get ltdc registers\n");
10691296 		ret = PTR_ERR(ldev->regs);
10701297 		goto err;
1071
-	}
1072
-
1073
-	for (i = 0; i < MAX_IRQ; i++) {
1074
-		irq = platform_get_irq(pdev, i);
1075
-		if (irq < 0)
1076
-			continue;
1077
-
1078
-		ret = devm_request_threaded_irq(dev, irq, ltdc_irq,
1079
-						ltdc_irq_thread, IRQF_ONESHOT,
1080
-						dev_name(dev), ddev);
1081
-		if (ret) {
1082
-			DRM_ERROR("Failed to register LTDC interrupt\n");
1083
-			goto err;
1084
-		}
1085
-	}
1086
-
1087
-	if (!IS_ERR(rstc)) {
1088
-		reset_control_assert(rstc);
1089
-		usleep_range(10, 20);
1090
-		reset_control_deassert(rstc);
10911298 	}
10921299 
10931300 	/* Disable interrupts */
....@@ -1101,27 +1308,23 @@
11011308 		goto err;
11021309 	}
11031310 
1104
-	DRM_INFO("ltdc hw version 0x%08x - ready\n", ldev->caps.hw_version);
1311
+	DRM_DEBUG_DRIVER("ltdc hw version 0x%08x\n", ldev->caps.hw_version);
11051312 
1106
-	/* Add endpoints panels or bridges if any */
1107
-	for (i = 0; i < MAX_ENDPOINTS; i++) {
1108
-		if (panel[i]) {
1109
-			bridge[i] = drm_panel_bridge_add(panel[i],
1110
-							DRM_MODE_CONNECTOR_DPI);
1111
-			if (IS_ERR(bridge[i])) {
1112
-				DRM_ERROR("panel-bridge endpoint %d\n", i);
1113
-				ret = PTR_ERR(bridge[i]);
1114
-				goto err;
1115
-			}
1313
+	for (i = 0; i < ldev->caps.nb_irq; i++) {
1314
+		irq = platform_get_irq(pdev, i);
1315
+		if (irq < 0) {
1316
+			ret = irq;
1317
+			goto err;
11161318 		}
11171319 
1118
-		if (bridge[i]) {
1119
-			ret = ltdc_encoder_init(ddev, bridge[i]);
1120
-			if (ret) {
1121
-				DRM_ERROR("init encoder endpoint %d\n", i);
1122
-				goto err;
1123
-			}
1320
+		ret = devm_request_threaded_irq(dev, irq, ltdc_irq,
1321
+						ltdc_irq_thread, IRQF_ONESHOT,
1322
+						dev_name(dev), ddev);
1323
+		if (ret) {
1324
+			DRM_ERROR("Failed to register LTDC interrupt\n");
1325
+			goto err;
11241326 		}
1327
+
11251328 	}
11261329 
11271330 	crtc = devm_kzalloc(dev, sizeof(*crtc), GFP_KERNEL);
....@@ -1130,6 +1333,8 @@
11301333 		ret = -ENOMEM;
11311334 		goto err;
11321335 	}
1336
+
1337
+	ddev->mode_config.allow_fb_modifiers = true;
11331338 
11341339 	ret = ltdc_crtc_init(ddev, crtc);
11351340 	if (ret) {
....@@ -1146,11 +1351,16 @@
11461351 	/* Allow usage of vblank without having to call drm_irq_install */
11471352 	ddev->irq_enabled = 1;
11481353 
1149
-	return 0;
1354
+	clk_disable_unprepare(ldev->pixel_clk);
11501355 
1356
+	pinctrl_pm_select_sleep_state(ddev->dev);
1357
+
1358
+	pm_runtime_enable(ddev->dev);
1359
+
1360
+	return 0;
11511361 err:
1152
-	for (i = 0; i < MAX_ENDPOINTS; i++)
1153
-		drm_panel_bridge_remove(bridge[i]);
1362
+	for (i = 0; i < nb_endpoints; i++)
1363
+		drm_of_panel_bridge_remove(ddev->dev->of_node, 0, i);
11541364 
11551365 	clk_disable_unprepare(ldev->pixel_clk);
11561366 
....@@ -1159,15 +1369,17 @@
11591369 
11601370 void ltdc_unload(struct drm_device *ddev)
11611371 {
1162
-	struct ltdc_device *ldev = ddev->dev_private;
1163
-	int i;
1372
+	struct device *dev = ddev->dev;
1373
+	int nb_endpoints, i;
11641374 
11651375 	DRM_DEBUG_DRIVER("\n");
11661376 
1167
-	for (i = 0; i < MAX_ENDPOINTS; i++)
1377
+	nb_endpoints = of_graph_get_endpoint_count(dev->of_node);
1378
+
1379
+	for (i = 0; i < nb_endpoints; i++)
11681380 		drm_of_panel_bridge_remove(ddev->dev->of_node, 0, i);
11691381 
1170
-	clk_disable_unprepare(ldev->pixel_clk);
1382
+	pm_runtime_disable(ddev->dev);
11711383 }
11721384 
11731385 MODULE_AUTHOR("Philippe Cornu <philippe.cornu@st.com>");