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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d

 kernel/drivers/gpu/drm/amd/display/dc/inc/clock_source.h
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@@ -78,7 +78,7 @@
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 };
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 struct pixel_clk_params {
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-	uint32_t requested_pix_clk; /* in KHz */
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+	uint32_t requested_pix_clk_100hz;
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 /*> Requested Pixel Clock
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  * (based on Video Timing standard used for requested mode)*/
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 	uint32_t requested_sym_clk; /* in KHz */
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@@ -104,9 +104,9 @@
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  *  with actually calculated Clock and reference Crystal frequency
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  */
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 struct pll_settings {
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-	uint32_t actual_pix_clk;
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-	uint32_t adjusted_pix_clk;
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-	uint32_t calculated_pix_clk;
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+	uint32_t actual_pix_clk_100hz;
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+	uint32_t adjusted_pix_clk_100hz;
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+	uint32_t calculated_pix_clk_100hz;
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 	uint32_t vco_freq;
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 	uint32_t reference_freq;
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 	uint32_t reference_divider;
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@@ -166,10 +166,10 @@
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 			struct clock_source *,
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 			struct pixel_clk_params *,
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 			struct pll_settings *);
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-	uint32_t (*get_pix_rate_in_hz)(
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-			struct clock_source *,
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-			struct pixel_clk_params *,
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-			struct pll_settings *);
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+	bool (*get_pixel_clk_frequency_100hz)(
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+			const struct clock_source *clock_source,
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+			unsigned int inst,
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+			unsigned int *pixel_clk_khz);
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 };
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 struct clock_source {