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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d

 kernel/arch/x86/kernel/apic/io_apic.c
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@@ -47,7 +47,7 @@
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 #include <linux/kthread.h>
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 #include <linux/jiffies.h>	/* time_after() */
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 #include <linux/slab.h>
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-#include <linux/bootmem.h>
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+#include <linux/memblock.h>
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51
 
52
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 #include <asm/irqdomain.h>
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 #include <asm/io.h>
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@@ -58,6 +58,7 @@
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 #include <asm/acpi.h>
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 #include <asm/dma.h>
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 #include <asm/timer.h>
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+#include <asm/time.h>
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 #include <asm/i8259.h>
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 #include <asm/setup.h>
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 #include <asm/irq_remapping.h>
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@@ -151,19 +152,6 @@
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 static inline bool mp_is_legacy_irq(int irq)
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 {
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 	return irq >= 0 && irq < nr_legacy_irqs();
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-}
155
-
156
-/*
157
- * Initialize all legacy IRQs and all pins on the first IOAPIC
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- * if we have legacy interrupt controller. Kernel boot option "pirq="
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- * may rely on non-legacy pins on the first IOAPIC.
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- */
161
-static inline int mp_init_irq_at_boot(int ioapic, int irq)
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-{
163
-	if (!nr_legacy_irqs())
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-		return 0;
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-
166
-	return ioapic == 0 || mp_is_legacy_irq(irq);
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155
 }
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156
 
169
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 static inline struct irq_domain *mp_ioapic_irqdomain(int ioapic)
..
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@@ -812,6 +800,7 @@
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 		return IOAPIC_POL_HIGH;
813
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 	case MP_IRQPOL_RESERVED:
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 		pr_warn("IOAPIC: Invalid polarity: 2, defaulting to low\n");
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+		fallthrough;
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 	case MP_IRQPOL_ACTIVE_LOW:
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 	default: /* Pointless default required due to do gcc stupidity */
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 		return IOAPIC_POL_LOW;
..
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@@ -859,6 +848,7 @@
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 		return IOAPIC_EDGE;
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849
 	case MP_IRQTRIG_RESERVED:
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 		pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n");
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+		fallthrough;
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 	case MP_IRQTRIG_LEVEL:
863
853
 	default: /* Pointless default required due to do gcc stupidity */
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 		return IOAPIC_LEVEL;
..
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@@ -870,10 +860,10 @@
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 {
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 	init_irq_alloc_info(info, NULL);
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 	info->type = X86_IRQ_ALLOC_TYPE_IOAPIC;
873
-	info->ioapic_node = node;
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-	info->ioapic_trigger = trigger;
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-	info->ioapic_polarity = polarity;
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-	info->ioapic_valid = 1;
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+	info->ioapic.node = node;
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+	info->ioapic.trigger = trigger;
865
+	info->ioapic.polarity = polarity;
866
+	info->ioapic.valid = 1;
877
867
 }
878
868
 
879
869
 #ifndef CONFIG_ACPI
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@@ -888,32 +878,32 @@
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878
 
889
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 	copy_irq_alloc_info(dst, src);
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 	dst->type = X86_IRQ_ALLOC_TYPE_IOAPIC;
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-	dst->ioapic_id = mpc_ioapic_id(ioapic_idx);
892
-	dst->ioapic_pin = pin;
893
-	dst->ioapic_valid = 1;
894
-	if (src && src->ioapic_valid) {
895
-		dst->ioapic_node = src->ioapic_node;
896
-		dst->ioapic_trigger = src->ioapic_trigger;
897
-		dst->ioapic_polarity = src->ioapic_polarity;
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+	dst->devid = mpc_ioapic_id(ioapic_idx);
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+	dst->ioapic.pin = pin;
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+	dst->ioapic.valid = 1;
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+	if (src && src->ioapic.valid) {
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+		dst->ioapic.node = src->ioapic.node;
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+		dst->ioapic.trigger = src->ioapic.trigger;
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+		dst->ioapic.polarity = src->ioapic.polarity;
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888
 	} else {
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-		dst->ioapic_node = NUMA_NO_NODE;
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+		dst->ioapic.node = NUMA_NO_NODE;
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 		if (acpi_get_override_irq(gsi, &trigger, &polarity) >= 0) {
901
-			dst->ioapic_trigger = trigger;
902
-			dst->ioapic_polarity = polarity;
891
+			dst->ioapic.trigger = trigger;
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+			dst->ioapic.polarity = polarity;
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 		} else {
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 			/*
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 			 * PCI interrupts are always active low level
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 			 * triggered.
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 			 */
908
-			dst->ioapic_trigger = IOAPIC_LEVEL;
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-			dst->ioapic_polarity = IOAPIC_POL_LOW;
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+			dst->ioapic.trigger = IOAPIC_LEVEL;
899
+			dst->ioapic.polarity = IOAPIC_POL_LOW;
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 		}
911
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 	}
912
902
 }
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903
 
914
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 static int ioapic_alloc_attr_node(struct irq_alloc_info *info)
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905
 {
916
-	return (info && info->ioapic_valid) ? info->ioapic_node : NUMA_NO_NODE;
906
+	return (info && info->ioapic.valid) ? info->ioapic.node : NUMA_NO_NODE;
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907
 }
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908
 
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909
 static void mp_register_handler(unsigned int irq, unsigned long trigger)
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@@ -943,14 +933,14 @@
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 	 * pin with real trigger and polarity attributes.
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 	 */
945
935
 	if (irq < nr_legacy_irqs() && data->count == 1) {
946
-		if (info->ioapic_trigger != data->trigger)
947
-			mp_register_handler(irq, info->ioapic_trigger);
948
-		data->entry.trigger = data->trigger = info->ioapic_trigger;
949
-		data->entry.polarity = data->polarity = info->ioapic_polarity;
936
+		if (info->ioapic.trigger != data->trigger)
937
+			mp_register_handler(irq, info->ioapic.trigger);
938
+		data->entry.trigger = data->trigger = info->ioapic.trigger;
939
+		data->entry.polarity = data->polarity = info->ioapic.polarity;
950
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 	}
951
941
 
952
-	return data->trigger == info->ioapic_trigger &&
953
-	       data->polarity == info->ioapic_polarity;
942
+	return data->trigger == info->ioapic.trigger &&
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+	       data->polarity == info->ioapic.polarity;
954
944
 }
955
945
 
956
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 static int alloc_irq_from_domain(struct irq_domain *domain, int ioapic, u32 gsi,
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@@ -1012,7 +1002,7 @@
1012
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 		if (!mp_check_pin_attr(irq, info))
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 			return -EBUSY;
1014
1004
 		if (__add_pin_to_irq_node(irq_data->chip_data, node, ioapic,
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-					  info->ioapic_pin))
1005
+					  info->ioapic.pin))
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 			return -ENOMEM;
1017
1007
 	} else {
1018
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 		info->flags |= X86_IRQ_ALLOC_LEGACY;
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@@ -1732,7 +1722,7 @@
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 	return false;
1733
1723
 }
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1724
 
1735
-static inline bool ioapic_irqd_mask(struct irq_data *data)
1725
+static inline bool ioapic_prepare_move(struct irq_data *data)
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1726
 {
1737
1727
 	/* If we are moving the IRQ we need to mask it */
1738
1728
 	if (unlikely(irqd_is_setaffinity_pending(data))) {
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@@ -1743,9 +1733,9 @@
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 	return false;
1744
1734
 }
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1735
 
1746
-static inline void ioapic_irqd_unmask(struct irq_data *data, bool masked)
1736
+static inline void ioapic_finish_move(struct irq_data *data, bool moveit)
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1737
 {
1748
-	if (unlikely(masked)) {
1738
+	if (unlikely(moveit)) {
1749
1739
 		/* Only migrate the irq if the ack has been received.
1750
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 		 *
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 		 * On rare occasions the broadcast level triggered ack gets
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@@ -1780,11 +1770,11 @@
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 	}
1781
1771
 }
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 #else
1783
-static inline bool ioapic_irqd_mask(struct irq_data *data)
1773
+static inline bool ioapic_prepare_move(struct irq_data *data)
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 {
1785
1775
 	return false;
1786
1776
 }
1787
-static inline void ioapic_irqd_unmask(struct irq_data *data, bool masked)
1777
+static inline void ioapic_finish_move(struct irq_data *data, bool moveit)
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 {
1789
1779
 }
1790
1780
 #endif
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@@ -1793,11 +1783,11 @@
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 {
1794
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 	struct irq_cfg *cfg = irqd_cfg(irq_data);
1795
1785
 	unsigned long v;
1796
-	bool masked;
1786
+	bool moveit;
1797
1787
 	int i;
1798
1788
 
1799
1789
 	irq_complete_move(cfg);
1800
-	masked = ioapic_irqd_mask(irq_data);
1790
+	moveit = ioapic_prepare_move(irq_data);
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1791
 
1802
1792
 	/*
1803
1793
 	 * It appears there is an erratum which affects at least version 0x11
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@@ -1852,7 +1842,7 @@
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 		eoi_ioapic_pin(cfg->vector, irq_data->chip_data);
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1843
 	}
1854
1844
 
1855
-	ioapic_irqd_unmask(irq_data, masked);
1845
+	ioapic_finish_move(irq_data, moveit);
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1846
 }
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1847
 
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 static void ioapic_ir_ack_level(struct irq_data *irq_data)
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@@ -2114,8 +2104,8 @@
2114
2104
 		struct irq_alloc_info info;
2115
2105
 
2116
2106
 		ioapic_set_alloc_attr(&info, NUMA_NO_NODE, 0, 0);
2117
-		info.ioapic_id = mpc_ioapic_id(ioapic);
2118
-		info.ioapic_pin = pin;
2107
+		info.devid = mpc_ioapic_id(ioapic);
2108
+		info.ioapic.pin = pin;
2119
2109
 		mutex_lock(&ioapic_mutex);
2120
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 		irq = alloc_isa_irq_from_domain(domain, 0, ioapic, pin, &info);
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2111
 		mutex_unlock(&ioapic_mutex);
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@@ -2141,6 +2131,9 @@
2141
2131
 	int apic1, pin1, apic2, pin2;
2142
2132
 	unsigned long flags;
2143
2133
 	int no_pin1 = 0;
2134
+
2135
+	if (!global_clock_event)
2136
+		return;
2144
2137
 
2145
2138
 	local_irq_save(flags);
2146
2139
 
..
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@@ -2316,9 +2309,9 @@
2316
2309
 		return 0;
2317
2310
 
2318
2311
 	init_irq_alloc_info(&info, NULL);
2319
-	info.type = X86_IRQ_ALLOC_TYPE_IOAPIC;
2320
-	info.ioapic_id = mpc_ioapic_id(ioapic);
2321
-	parent = irq_remapping_get_ir_irq_domain(&info);
2312
+	info.type = X86_IRQ_ALLOC_TYPE_IOAPIC_GET_PARENT;
2313
+	info.devid = mpc_ioapic_id(ioapic);
2314
+	parent = irq_remapping_get_irq_domain(&info);
2322
2315
 	if (!parent)
2323
2316
 		parent = x86_vector_domain;
2324
2317
 	else
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@@ -2651,7 +2644,9 @@
2651
2644
 	n = IOAPIC_RESOURCE_NAME_SIZE + sizeof(struct resource);
2652
2645
 	n *= nr_ioapics;
2653
2646
 
2654
-	mem = alloc_bootmem(n);
2647
+	mem = memblock_alloc(n, SMP_CACHE_BYTES);
2648
+	if (!mem)
2649
+		panic("%s: Failed to allocate %lu bytes\n", __func__, n);
2655
2650
 	res = (void *)mem;
2656
2651
 
2657
2652
 	mem += sizeof(struct resource) * nr_ioapics;
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@@ -2694,7 +2689,11 @@
2694
2689
 #ifdef CONFIG_X86_32
2695
2690
 fake_ioapic_page:
2696
2691
 #endif
2697
-			ioapic_phys = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
2692
+			ioapic_phys = (unsigned long)memblock_alloc(PAGE_SIZE,
2693
+								    PAGE_SIZE);
2694
+			if (!ioapic_phys)
2695
+				panic("%s: Failed to allocate %lu bytes align=0x%lx\n",
2696
+				      __func__, PAGE_SIZE, PAGE_SIZE);
2698
2697
 			ioapic_phys = __pa(ioapic_phys);
2699
2698
 		}
2700
2699
 		set_fixmap_nocache(idx, ioapic_phys);
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@@ -2946,9 +2945,9 @@
2946
2945
 static void mp_irqdomain_get_attr(u32 gsi, struct mp_chip_data *data,
2947
2946
 				  struct irq_alloc_info *info)
2948
2947
 {
2949
-	if (info && info->ioapic_valid) {
2950
-		data->trigger = info->ioapic_trigger;
2951
-		data->polarity = info->ioapic_polarity;
2948
+	if (info && info->ioapic.valid) {
2949
+		data->trigger = info->ioapic.trigger;
2950
+		data->polarity = info->ioapic.polarity;
2952
2951
 	} else if (acpi_get_override_irq(gsi, &data->trigger,
2953
2952
 					 &data->polarity) < 0) {
2954
2953
 		/* PCI interrupts are always active low level triggered. */
..
..
@@ -2994,7 +2993,7 @@
2994
2993
 		return -EINVAL;
2995
2994
 
2996
2995
 	ioapic = mp_irqdomain_ioapic_idx(domain);
2997
-	pin = info->ioapic_pin;
2996
+	pin = info->ioapic.pin;
2998
2997
 	if (irq_find_mapping(domain, (irq_hw_number_t)pin) > 0)
2999
2998
 		return -EEXIST;
3000
2999
 
..
..
@@ -3002,7 +3001,7 @@
3002
3001
 	if (!data)
3003
3002
 		return -ENOMEM;
3004
3003
 
3005
-	info->ioapic_entry = &data->entry;
3004
+	info->ioapic.entry = &data->entry;
3006
3005
 	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, info);
3007
3006
 	if (ret < 0) {
3008
3007
 		kfree(data);
..
..
@@ -3010,7 +3009,7 @@
3010
3009
 	}
3011
3010
 
3012
3011
 	INIT_LIST_HEAD(&data->irq_2_pin);
3013
-	irq_data->hwirq = info->ioapic_pin;
3012
+	irq_data->hwirq = info->ioapic.pin;
3014
3013
 	irq_data->chip = (domain->parent == x86_vector_domain) ?
3015
3014
 			  &ioapic_chip : &ioapic_ir_chip;
3016
3015
 	irq_data->chip_data = data;
..
..
@@ -3020,8 +3019,8 @@
3020
3019
 	add_pin_to_irq_node(data, ioapic_alloc_attr_node(info), ioapic, pin);
3021
3020
 
3022
3021
 	local_irq_save(flags);
3023
-	if (info->ioapic_entry)
3024
-		mp_setup_entry(cfg, data, info->ioapic_entry);
3022
+	if (info->ioapic.entry)
3023
+		mp_setup_entry(cfg, data, info->ioapic.entry);
3025
3024
 	mp_register_handler(virq, data->trigger);
3026
3025
 	if (virq < nr_legacy_irqs())
3027
3026
 		legacy_pic->mask(virq);