.. | .. |
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8 | 8 | |
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9 | 9 | #include <asm/asm.h> |
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10 | 10 | #include <linux/bitops.h> |
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| 11 | +#include <asm/alternative.h> |
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11 | 12 | |
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12 | 13 | enum cpuid_leafs |
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13 | 14 | { |
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.. | .. |
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23 | 24 | CPUID_7_0_EBX, |
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24 | 25 | CPUID_D_1_EAX, |
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25 | 26 | CPUID_LNX_4, |
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26 | | - CPUID_DUMMY, |
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| 27 | + CPUID_7_1_EAX, |
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27 | 28 | CPUID_8000_0008_EBX, |
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28 | 29 | CPUID_6_EAX, |
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29 | 30 | CPUID_8000_000A_EDX, |
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.. | .. |
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49 | 50 | extern const char * const x86_bug_flags[NBUGINTS*32]; |
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50 | 51 | |
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51 | 52 | #define test_cpu_cap(c, bit) \ |
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52 | | - test_bit(bit, (unsigned long *)((c)->x86_capability)) |
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| 53 | + arch_test_bit(bit, (unsigned long *)((c)->x86_capability)) |
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53 | 54 | |
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54 | 55 | /* |
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55 | 56 | * There are 32 bits/features in each mask word. The high bits |
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.. | .. |
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61 | 62 | #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \ |
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62 | 63 | (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word )) |
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63 | 64 | |
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| 65 | +/* |
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| 66 | + * {REQUIRED,DISABLED}_MASK_CHECK below may seem duplicated with the |
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| 67 | + * following BUILD_BUG_ON_ZERO() check but when NCAPINTS gets changed, all |
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| 68 | + * header macros which use NCAPINTS need to be changed. The duplicated macro |
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| 69 | + * use causes the compiler to issue errors for all headers so that all usage |
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| 70 | + * sites can be corrected. |
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| 71 | + */ |
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64 | 72 | #define REQUIRED_MASK_BIT_SET(feature_bit) \ |
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65 | 73 | ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \ |
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66 | 74 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \ |
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.. | .. |
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112 | 120 | test_cpu_cap(c, bit)) |
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113 | 121 | |
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114 | 122 | #define this_cpu_has(bit) \ |
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115 | | - (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ |
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116 | | - x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability)) |
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| 123 | + (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ |
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| 124 | + x86_this_cpu_test_bit(bit, \ |
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| 125 | + (unsigned long __percpu *)&cpu_info.x86_capability)) |
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117 | 126 | |
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118 | 127 | /* |
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119 | 128 | * This macro is for detection of features which need kernel |
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.. | .. |
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146 | 155 | * Workaround for the sake of BPF compilation which utilizes kernel |
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147 | 156 | * headers, but clang does not support ASM GOTO and fails the build. |
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148 | 157 | */ |
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| 158 | +#ifndef __BPF_TRACING__ |
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| 159 | +#warning "Compiler lacks ASM_GOTO support. Add -D __BPF_TRACING__ to your compiler arguments" |
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| 160 | +#endif |
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149 | 161 | |
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150 | 162 | #define static_cpu_has(bit) boot_cpu_has(bit) |
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151 | 163 | |
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152 | 164 | #else |
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153 | 165 | |
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154 | 166 | /* |
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155 | | - * Static testing of CPU features. Used the same as boot_cpu_has(). |
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156 | | - * These will statically patch the target code for additional |
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157 | | - * performance. |
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| 167 | + * Static testing of CPU features. Used the same as boot_cpu_has(). It |
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| 168 | + * statically patches the target code for additional performance. Use |
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| 169 | + * static_cpu_has() only in fast paths, where every cycle counts. Which |
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| 170 | + * means that the boot_cpu_has() variant is already fast enough for the |
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| 171 | + * majority of cases and you should stick to using it as it is generally |
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| 172 | + * only two instructions: a RIP-relative MOV and a TEST. |
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158 | 173 | */ |
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159 | | -static __always_inline __pure bool _static_cpu_has(u16 bit) |
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| 174 | +static __always_inline bool _static_cpu_has(u16 bit) |
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160 | 175 | { |
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161 | | - asm_volatile_goto("1: jmp 6f\n" |
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162 | | - "2:\n" |
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163 | | - ".skip -(((5f-4f) - (2b-1b)) > 0) * " |
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164 | | - "((5f-4f) - (2b-1b)),0x90\n" |
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165 | | - "3:\n" |
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166 | | - ".section .altinstructions,\"a\"\n" |
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167 | | - " .long 1b - .\n" /* src offset */ |
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168 | | - " .long 4f - .\n" /* repl offset */ |
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169 | | - " .word %P[always]\n" /* always replace */ |
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170 | | - " .byte 3b - 1b\n" /* src len */ |
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171 | | - " .byte 5f - 4f\n" /* repl len */ |
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172 | | - " .byte 3b - 2b\n" /* pad len */ |
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173 | | - ".previous\n" |
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174 | | - ".section .altinstr_replacement,\"ax\"\n" |
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175 | | - "4: jmp %l[t_no]\n" |
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176 | | - "5:\n" |
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177 | | - ".previous\n" |
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178 | | - ".section .altinstructions,\"a\"\n" |
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179 | | - " .long 1b - .\n" /* src offset */ |
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180 | | - " .long 0\n" /* no replacement */ |
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181 | | - " .word %P[feature]\n" /* feature bit */ |
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182 | | - " .byte 3b - 1b\n" /* src len */ |
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183 | | - " .byte 0\n" /* repl len */ |
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184 | | - " .byte 0\n" /* pad len */ |
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185 | | - ".previous\n" |
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186 | | - ".section .altinstr_aux,\"ax\"\n" |
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187 | | - "6:\n" |
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188 | | - " testb %[bitnum],%[cap_byte]\n" |
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189 | | - " jnz %l[t_yes]\n" |
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190 | | - " jmp %l[t_no]\n" |
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191 | | - ".previous\n" |
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| 176 | + asm_volatile_goto( |
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| 177 | + ALTERNATIVE_TERNARY("jmp 6f", %P[feature], "", "jmp %l[t_no]") |
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| 178 | + ".section .altinstr_aux,\"ax\"\n" |
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| 179 | + "6:\n" |
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| 180 | + " testb %[bitnum],%[cap_byte]\n" |
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| 181 | + " jnz %l[t_yes]\n" |
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| 182 | + " jmp %l[t_no]\n" |
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| 183 | + ".previous\n" |
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192 | 184 | : : [feature] "i" (bit), |
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193 | | - [always] "i" (X86_FEATURE_ALWAYS), |
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194 | 185 | [bitnum] "i" (1 << (bit & 7)), |
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195 | 186 | [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3]) |
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196 | 187 | : : t_yes, t_no); |
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