.. | .. |
---|
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
---|
1 | 2 | /* |
---|
2 | 3 | * AMD Memory Encryption Support |
---|
3 | 4 | * |
---|
4 | 5 | * Copyright (C) 2017 Advanced Micro Devices, Inc. |
---|
5 | 6 | * |
---|
6 | 7 | * Author: Tom Lendacky <thomas.lendacky@amd.com> |
---|
7 | | - * |
---|
8 | | - * This program is free software; you can redistribute it and/or modify |
---|
9 | | - * it under the terms of the GNU General Public License version 2 as |
---|
10 | | - * published by the Free Software Foundation. |
---|
11 | 8 | */ |
---|
12 | 9 | |
---|
13 | 10 | #include <linux/linkage.h> |
---|
.. | .. |
---|
18 | 15 | |
---|
19 | 16 | .text |
---|
20 | 17 | .code32 |
---|
21 | | -ENTRY(get_sev_encryption_bit) |
---|
| 18 | +SYM_FUNC_START(get_sev_encryption_bit) |
---|
22 | 19 | xor %eax, %eax |
---|
23 | 20 | |
---|
24 | 21 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
---|
25 | 22 | push %ebx |
---|
26 | 23 | push %ecx |
---|
27 | 24 | push %edx |
---|
28 | | - |
---|
29 | | - /* Check if running under a hypervisor */ |
---|
30 | | - movl $1, %eax |
---|
31 | | - cpuid |
---|
32 | | - bt $31, %ecx /* Check the hypervisor bit */ |
---|
33 | | - jnc .Lno_sev |
---|
34 | 25 | |
---|
35 | 26 | movl $0x80000000, %eax /* CPUID to check the highest leaf */ |
---|
36 | 27 | cpuid |
---|
.. | .. |
---|
67 | 58 | |
---|
68 | 59 | #endif /* CONFIG_AMD_MEM_ENCRYPT */ |
---|
69 | 60 | |
---|
70 | | - ret |
---|
71 | | -ENDPROC(get_sev_encryption_bit) |
---|
| 61 | + RET |
---|
| 62 | +SYM_FUNC_END(get_sev_encryption_bit) |
---|
72 | 63 | |
---|
73 | 64 | .code64 |
---|
74 | | -ENTRY(set_sev_encryption_mask) |
---|
| 65 | + |
---|
| 66 | +#include "../../kernel/sev_verify_cbit.S" |
---|
| 67 | + |
---|
| 68 | +SYM_FUNC_START(set_sev_encryption_mask) |
---|
75 | 69 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
---|
76 | 70 | push %rbp |
---|
77 | 71 | push %rdx |
---|
.. | .. |
---|
84 | 78 | |
---|
85 | 79 | bts %rax, sme_me_mask(%rip) /* Create the encryption mask */ |
---|
86 | 80 | |
---|
| 81 | + /* |
---|
| 82 | + * Read MSR_AMD64_SEV again and store it to sev_status. Can't do this in |
---|
| 83 | + * get_sev_encryption_bit() because this function is 32-bit code and |
---|
| 84 | + * shared between 64-bit and 32-bit boot path. |
---|
| 85 | + */ |
---|
| 86 | + movl $MSR_AMD64_SEV, %ecx /* Read the SEV MSR */ |
---|
| 87 | + rdmsr |
---|
| 88 | + |
---|
| 89 | + /* Store MSR value in sev_status */ |
---|
| 90 | + shlq $32, %rdx |
---|
| 91 | + orq %rdx, %rax |
---|
| 92 | + movq %rax, sev_status(%rip) |
---|
| 93 | + |
---|
87 | 94 | .Lno_sev_mask: |
---|
88 | 95 | movq %rbp, %rsp /* Restore original stack pointer */ |
---|
89 | 96 | |
---|
.. | .. |
---|
92 | 99 | #endif |
---|
93 | 100 | |
---|
94 | 101 | xor %rax, %rax |
---|
95 | | - ret |
---|
96 | | -ENDPROC(set_sev_encryption_mask) |
---|
| 102 | + RET |
---|
| 103 | +SYM_FUNC_END(set_sev_encryption_mask) |
---|
97 | 104 | |
---|
98 | 105 | .data |
---|
99 | 106 | |
---|
100 | 107 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
---|
101 | 108 | .balign 8 |
---|
102 | | -GLOBAL(sme_me_mask) |
---|
103 | | - .quad 0 |
---|
| 109 | +SYM_DATA(sme_me_mask, .quad 0) |
---|
| 110 | +SYM_DATA(sev_status, .quad 0) |
---|
| 111 | +SYM_DATA(sev_check_data, .quad 0) |
---|
104 | 112 | #endif |
---|