.. | .. |
---|
950 | 950 | /include/ "qoriq-clockgen2.dtsi" |
---|
951 | 951 | global-utilities@e1000 { |
---|
952 | 952 | compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0"; |
---|
953 | | - |
---|
954 | | - pll2: pll2@840 { |
---|
955 | | - #clock-cells = <1>; |
---|
956 | | - reg = <0x840 0x4>; |
---|
957 | | - compatible = "fsl,qoriq-core-pll-2.0"; |
---|
958 | | - clocks = <&sysclk>; |
---|
959 | | - clock-output-names = "pll2", "pll2-div2", "pll2-div4"; |
---|
960 | | - }; |
---|
961 | | - |
---|
962 | | - pll3: pll3@860 { |
---|
963 | | - #clock-cells = <1>; |
---|
964 | | - reg = <0x860 0x4>; |
---|
965 | | - compatible = "fsl,qoriq-core-pll-2.0"; |
---|
966 | | - clocks = <&sysclk>; |
---|
967 | | - clock-output-names = "pll3", "pll3-div2", "pll3-div4"; |
---|
968 | | - }; |
---|
969 | | - |
---|
970 | | - pll4: pll4@880 { |
---|
971 | | - #clock-cells = <1>; |
---|
972 | | - reg = <0x880 0x4>; |
---|
973 | | - compatible = "fsl,qoriq-core-pll-2.0"; |
---|
974 | | - clocks = <&sysclk>; |
---|
975 | | - clock-output-names = "pll4", "pll4-div2", "pll4-div4"; |
---|
976 | | - }; |
---|
977 | | - |
---|
978 | | - mux0: mux0@0 { |
---|
979 | | - #clock-cells = <0>; |
---|
980 | | - reg = <0x0 0x4>; |
---|
981 | | - compatible = "fsl,qoriq-core-mux-2.0"; |
---|
982 | | - clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, |
---|
983 | | - <&pll1 0>, <&pll1 1>, <&pll1 2>, |
---|
984 | | - <&pll2 0>, <&pll2 1>, <&pll2 2>; |
---|
985 | | - clock-names = "pll0", "pll0-div2", "pll0-div4", |
---|
986 | | - "pll1", "pll1-div2", "pll1-div4", |
---|
987 | | - "pll2", "pll2-div2", "pll2-div4"; |
---|
988 | | - clock-output-names = "cmux0"; |
---|
989 | | - }; |
---|
990 | | - |
---|
991 | | - mux1: mux1@20 { |
---|
992 | | - #clock-cells = <0>; |
---|
993 | | - reg = <0x20 0x4>; |
---|
994 | | - compatible = "fsl,qoriq-core-mux-2.0"; |
---|
995 | | - clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, |
---|
996 | | - <&pll1 0>, <&pll1 1>, <&pll1 2>, |
---|
997 | | - <&pll2 0>, <&pll2 1>, <&pll2 2>; |
---|
998 | | - clock-names = "pll0", "pll0-div2", "pll0-div4", |
---|
999 | | - "pll1", "pll1-div2", "pll1-div4", |
---|
1000 | | - "pll2", "pll2-div2", "pll2-div4"; |
---|
1001 | | - clock-output-names = "cmux1"; |
---|
1002 | | - }; |
---|
1003 | | - |
---|
1004 | | - mux2: mux2@40 { |
---|
1005 | | - #clock-cells = <0>; |
---|
1006 | | - reg = <0x40 0x4>; |
---|
1007 | | - compatible = "fsl,qoriq-core-mux-2.0"; |
---|
1008 | | - clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>, |
---|
1009 | | - <&pll4 0>, <&pll4 1>, <&pll4 2>; |
---|
1010 | | - clock-names = "pll3", "pll3-div2", "pll3-div4", |
---|
1011 | | - "pll4", "pll4-div2", "pll4-div4"; |
---|
1012 | | - clock-output-names = "cmux2"; |
---|
1013 | | - }; |
---|
1014 | 953 | }; |
---|
1015 | 954 | |
---|
1016 | 955 | rcpm: global-utilities@e2000 { |
---|