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hc

2023-12-08 01573e231f18eb2d99162747186f59511f56b64d

 kernel/arch/mips/sgi-ip32/ip32-irq.c
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@@ -111,16 +111,6 @@
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 extern irqreturn_t crime_memerr_intr(int irq, void *dev_id);
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 extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
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-static struct irqaction memerr_irq = {
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-	.handler = crime_memerr_intr,
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-	.name = "CRIME memory error",
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-};
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-
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-static struct irqaction cpuerr_irq = {
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-	.handler = crime_cpuerr_intr,
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-	.name = "CRIME CPU error",
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-};
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-
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 /*
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  * This is for pure CRIME interrupts - ie not MACE.  The advantage?
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  * We get to split the register in half and do faster lookups.
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@@ -497,8 +487,12 @@
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 			break;
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 		}
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 	}
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-	setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
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-	setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);
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+	if (request_irq(CRIME_MEMERR_IRQ, crime_memerr_intr, 0,
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+			"CRIME memory error", NULL))
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+		pr_err("Failed to register CRIME memory error interrupt\n");
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+	if (request_irq(CRIME_CPUERR_IRQ, crime_cpuerr_intr, 0,
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+			"CRIME CPU error", NULL))
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+		pr_err("Failed to register CRIME CPU error interrupt\n");
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 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
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 	change_c0_status(ST0_IM, ALLINTS);