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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d 
 kernel/arch/arm64/include/asm/hardirq.h
....@@ -1,17 +1,6 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23  * Copyright (C) 2012 ARM Ltd.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
154  */
165 #ifndef __ASM_HARDIRQ_H
176 #define __ASM_HARDIRQ_H
....@@ -24,49 +13,77 @@
2413 #include <asm/kvm_arm.h>
2514 #include <asm/sysreg.h>
2615 
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-#define NR_IPI	7
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-
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-typedef struct {
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-	unsigned int __softirq_pending;
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-	unsigned int ipi_irqs[NR_IPI];
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-} ____cacheline_aligned irq_cpustat_t;
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-
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-#include <linux/irq_cpustat.h>	/* Standard mappings for irq_cpustat_t above */
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-
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-#define __inc_irq_stat(cpu, member)	__IRQ_STAT(cpu, member)++
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-#define __get_irq_stat(cpu, member)	__IRQ_STAT(cpu, member)
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-
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-u64 smp_irq_stat_cpu(unsigned int cpu);
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-#define arch_irq_stat_cpu	smp_irq_stat_cpu
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+#define ack_bad_irq ack_bad_irq
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+#include <asm-generic/hardirq.h>
4118 
4219 #define __ARCH_IRQ_EXIT_IRQS_DISABLED	1
4320 
4421 struct nmi_ctx {
4522 	u64 hcr;
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+	unsigned int cnt;
4624 };
4725 
4826 DECLARE_PER_CPU(struct nmi_ctx, nmi_contexts);
4927 
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-#define arch_nmi_enter()							\
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-	do {									\
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-		if (is_kernel_in_hyp_mode()) {					\
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-			struct nmi_ctx *nmi_ctx = this_cpu_ptr(&nmi_contexts);	\
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-			nmi_ctx->hcr = read_sysreg(hcr_el2);			\
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-			if (!(nmi_ctx->hcr & HCR_TGE)) {			\
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-				write_sysreg(nmi_ctx->hcr | HCR_TGE, hcr_el2);	\
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-				isb();						\
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-			}							\
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-		}								\
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-	} while (0)
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+#define arch_nmi_enter()						\
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+do {									\
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+	struct nmi_ctx *___ctx;						\
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+	u64 ___hcr;							\
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+									\
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+	if (!is_kernel_in_hyp_mode())					\
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+		break;							\
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+									\
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+	___ctx = this_cpu_ptr(&nmi_contexts);				\
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+	if (___ctx->cnt) {						\
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+		___ctx->cnt++;						\
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+		break;							\
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+	}								\
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+									\
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+	___hcr = read_sysreg(hcr_el2);					\
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+	if (!(___hcr & HCR_TGE)) {					\
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+		write_sysreg(___hcr | HCR_TGE, hcr_el2);		\
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+		isb();							\
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+	}								\
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+	/*								\
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+	 * Make sure the sysreg write is performed before ___ctx->cnt	\
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+	 * is set to 1. NMIs that see cnt == 1 will rely on us.		\
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+	 */								\
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+	barrier();							\
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+	___ctx->cnt = 1;                                                \
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+	/*								\
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+	 * Make sure ___ctx->cnt is set before we save ___hcr. We	\
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+	 * don't want ___ctx->hcr to be overwritten.			\
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+	 */								\
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+	barrier();							\
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+	___ctx->hcr = ___hcr;						\
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+} while (0)
6160 
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-#define arch_nmi_exit()								\
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-	do {									\
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-		if (is_kernel_in_hyp_mode()) {					\
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-			struct nmi_ctx *nmi_ctx = this_cpu_ptr(&nmi_contexts);	\
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-			if (!(nmi_ctx->hcr & HCR_TGE))				\
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-				write_sysreg(nmi_ctx->hcr, hcr_el2);		\
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-		}								\
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-	} while (0)
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+#define arch_nmi_exit()							\
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+do {									\
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+	struct nmi_ctx *___ctx;						\
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+	u64 ___hcr;							\
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+									\
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+	if (!is_kernel_in_hyp_mode())					\
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+		break;							\
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+									\
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+	___ctx = this_cpu_ptr(&nmi_contexts);				\
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+	___hcr = ___ctx->hcr;						\
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+	/*								\
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+	 * Make sure we read ___ctx->hcr before we release		\
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+	 * ___ctx->cnt as it makes ___ctx->hcr updatable again.		\
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+	 */								\
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+	barrier();							\
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+	___ctx->cnt--;							\
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+	/*								\
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+	 * Make sure ___ctx->cnt release is visible before we		\
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+	 * restore the sysreg. Otherwise a new NMI occurring		\
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+	 * right after write_sysreg() can be fooled and think		\
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+	 * we secured things for it.					\
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+	 */								\
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+	barrier();							\
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+	if (!___ctx->cnt && !(___hcr & HCR_TGE))			\
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+		write_sysreg(___hcr, hcr_el2);				\
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+} while (0)
7087 
7188 static inline void ack_bad_irq(unsigned int irq)
7289 {