forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
....@@ -8,6 +8,7 @@
88
99 #include <dt-bindings/gpio/gpio.h>
1010 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
1112 #include "rk3568.dtsi"
1213 #include "rk3568-evb.dtsi"
1314
....@@ -18,6 +19,7 @@
1819 rk_headset: rk-headset {
1920 compatible = "rockchip_headset";
2021 headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
2123 pinctrl-names = "default";
2224 pinctrl-0 = <&hp_det>;
2325 };
....@@ -32,6 +34,15 @@
3234 vin-supply = <&vcc3v3_sys>;
3335 };
3436
37
+ vcc3v3_vga: vcc3v3-vga {
38
+ compatible = "regulator-fixed";
39
+ regulator-name = "vcc3v3_vga";
40
+ regulator-always-on;
41
+ regulator-boot-on;
42
+ gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
43
+ enable-active-high;
44
+ vin-supply = <&vcc3v3_sys>;
45
+ };
3546
3647 pcie30_avdd0v9: pcie30-avdd0v9 {
3748 compatible = "regulator-fixed";
....@@ -58,7 +69,9 @@
5869 regulator-name = "vcc3v3_pcie";
5970 regulator-min-microvolt = <3300000>;
6071 regulator-max-microvolt = <3300000>;
72
+ regulator-always-on;
6173 enable-active-high;
74
+ regulator-boot-on;
6275 gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
6376 startup-delay-us = <5000>;
6477 vin-supply = <&dc_12v>;
....@@ -85,16 +98,110 @@
8598 regulator-boot-on;
8699 };
87100 #endif
88
-
101
+ ndj_io_init {
102
+ compatible = "nk_io_control";
103
+ pinctrl-names = "default";
104
+ pinctrl-0 = <&nk_io_gpio>;
105
+
106
+ //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
107
+
108
+ vcc_5v {
109
+ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
110
+ gpio_function = <0>;
111
+ };
112
+
113
+ vcc_12v {
114
+ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
115
+ gpio_function = <0>;
116
+ };
117
+
118
+ hub_host2_rst {
119
+ gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
120
+ gpio_function = <3>;
121
+ };
122
+
123
+ hub_host3 {
124
+ gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
125
+ gpio_function = <0>;
126
+ };
127
+
128
+ wake_4g {
129
+ gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
130
+ gpio_function = <0>;
131
+ };
132
+
133
+ air_mode_4g {
134
+ gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
135
+ gpio_function = <0>;
136
+ };
137
+
138
+ reset_4g {
139
+ gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
140
+ gpio_function = <3>;
141
+ };
142
+
143
+ en_4g {
144
+ gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
145
+ gpio_function = <0>;
146
+ };
147
+
148
+ hp_en {
149
+ gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
150
+ gpio_function = <0>;
151
+ };
152
+
153
+ wifi_power_en {
154
+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
155
+ gpio_function = <0>;
156
+ };
157
+ #if 0
158
+ do1 {
159
+ gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
160
+ gpio_function = <0>;
161
+ };
162
+
163
+ do2 {
164
+ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
165
+ gpio_function = <0>;
166
+ };
167
+
168
+ do3 {
169
+ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
170
+ gpio_function = <0>;
171
+ };
172
+
173
+ do4 {
174
+ gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
175
+ gpio_function = <0>;
176
+ };
177
+
178
+ do5 {
179
+ gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
180
+ gpio_function = <0>;
181
+ };
182
+
183
+ do6 {
184
+ gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
185
+ gpio_function = <0>;
186
+ };
187
+
188
+ do7 {
189
+ gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
190
+ gpio_function = <0>;
191
+ };
192
+
193
+ di1 {
194
+ gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
195
+ gpio_function = <1>;
196
+ };
197
+ #endif
198
+ };
199
+#if 0
89200 nk_io_init {
90201 compatible = "nk_io_control";
91
-// usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
92
- lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
93
- lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
94
- vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
202
+// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
95203 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
96204 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
97
-// hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
98205 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
99206 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
100207 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
....@@ -102,23 +209,55 @@
102209 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
103210 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
104211 hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
105
- spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
106
-
107
- edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
108
- edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
109
- edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
110
- edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
111
- edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
112
- edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
113
-// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
114
-// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
115
-
212
+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
116213 wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
117
-
214
+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
118215 pinctrl-names = "default";
119
- pinctrl-0 = <&nk_io_gpio>;
120
- nodka_lvds = <9>;
216
+ pinctrl-0 = <&nk_io_gpio>;
121217 };
218
+#endif
219
+ panel: panel {
220
+ compatible = "simple-panel";
221
+ backlight = <&backlight>;
222
+ power-supply = <&vcc3v3_lcd0_n>;
223
+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
224
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
225
+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
226
+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
227
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
228
+ bpc = <8>;
229
+ prepare-delay-ms = <200>;
230
+ enable-delay-ms = <20>;
231
+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
232
+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
233
+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
234
+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
235
+ nodka-lvds = <15>;
236
+
237
+ display-timings {
238
+ native-mode = <&timing0>;
239
+ timing0: timing0 {
240
+ clock-frequency = <72500000>;
241
+ hactive = <1280>;
242
+ vactive = <800>;
243
+ hfront-porch = <70>;
244
+ hsync-len = <2>;
245
+ hback-porch = <88>;
246
+ vfront-porch = <7>;
247
+ vsync-len = <4>;
248
+ vback-porch = <17>;
249
+ hsync-active = <21>;
250
+ vsync-active = <0>;
251
+ de-active = <0>;
252
+ pixelclk-active = <0>;
253
+ };
254
+ };
255
+ ports {
256
+ panel_in: endpoint {
257
+ remote-endpoint = <&edp_out>;
258
+ };
259
+ };
260
+ };
122261 };
123262
124263 &combphy0_us {
....@@ -134,11 +273,11 @@
134273 };
135274
136275 &csi2_dphy_hw {
137
- status = "okay";
276
+ status = "disabled";
138277 };
139278
140279 &csi2_dphy0 {
141
- status = "okay";
280
+ status = "disabled";
142281
143282 ports {
144283 #address-cells = <1>;
....@@ -181,8 +320,12 @@
181320 * video_phy0 needs to be enabled
182321 * when dsi0 is enabled
183322 */
323
+&video_phy0 {
324
+ status = "disabled";
325
+};
326
+
184327 &dsi0 {
185
- status = "okay";
328
+ status = "disabled";
186329 };
187330
188331 &dsi0_in_vp0 {
....@@ -190,7 +333,7 @@
190333 };
191334
192335 &dsi0_in_vp1 {
193
- status = "okay";
336
+ status = "disabled";
194337 };
195338
196339 &dsi0_panel {
....@@ -201,6 +344,10 @@
201344 * video_phy1 needs to be enabled
202345 * when dsi1 is enabled
203346 */
347
+
348
+&video_phy1 {
349
+ status = "okay";
350
+};
204351 &dsi1 {
205352 status = "disabled";
206353 };
....@@ -210,16 +357,40 @@
210357 };
211358
212359 &dsi1_in_vp1 {
213
- status = "disabled";
360
+ status = "okay";
214361 };
215362
216363 &dsi1_panel {
217
- power-supply = <&vcc3v3_lcd1_n>;
364
+ power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
365
+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
366
+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
367
+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
368
+ pinctrl-names = "default";
369
+ pinctrl-0 = <&lcd1_rst_gpio>;
218370 };
219371
372
+&route_dsi1 {
373
+ status = "disabled";
374
+ connect = <&vp1_out_dsi1>;
375
+};
376
+
377
+
378
+/*
379
+* edp_start
380
+*/
381
+
220382 &edp {
221
- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
222
- status = "okay";
383
+ force-hpd;
384
+ status = "okay";
385
+ ports {
386
+ port@1 {
387
+ reg = <1>;
388
+ edp_out: endpoint {
389
+ remote-endpoint = <&panel_in>;
390
+ };
391
+ };
392
+
393
+ };
223394 };
224395
225396 &edp_phy {
....@@ -227,18 +398,67 @@
227398 };
228399
229400 &edp_in_vp0 {
230
- status = "okay";
401
+ status = "disabled";
231402 };
232403
233404 &edp_in_vp1 {
405
+ status = "okay";
406
+
407
+};
408
+
409
+&route_edp {
410
+ status = "okay";
411
+ connect = <&vp1_out_edp>;
412
+};
413
+
414
+&route_edp {
415
+ status = "okay";
416
+};
417
+/*
418
+* edp_end
419
+*/
420
+
421
+/*
422
+* Hdmi_start
423
+*/
424
+
425
+&hdmi {
426
+ status = "okay";
427
+ rockchip,phy-table =
428
+ <92812500 0x8009 0x0000 0x0270>,
429
+ <165000000 0x800b 0x0000 0x026d>,
430
+ <185625000 0x800b 0x0000 0x01ed>,
431
+ <297000000 0x800b 0x0000 0x01ad>,
432
+ <594000000 0x8029 0x0000 0x0088>,
433
+ <000000000 0x0000 0x0000 0x0000>;
434
+};
435
+
436
+&route_hdmi {
437
+ status = "okay";
438
+ connect = <&vp0_out_hdmi>;
439
+};
440
+
441
+&hdmi_in_vp0 {
442
+ status = "okay";
443
+};
444
+
445
+&hdmi_in_vp1 {
234446 status = "disabled";
235447 };
448
+
449
+&hdmi_sound {
450
+ status = "okay";
451
+};
452
+
453
+/*
454
+ * Hdmi_END
455
+*/
236456
237457 &gmac0 {
238458 phy-mode = "rgmii";
239459 clock_in_out = "output";
240460
241
- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
461
+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
242462 snps,reset-active-low;
243463 /* Reset time is 20ms, 100ms for rtl8211f */
244464 snps,reset-delays-us = <0 20000 100000>;
....@@ -258,7 +478,9 @@
258478 rx_delay = <0x2f>;
259479
260480 phy-handle = <&rgmii_phy0>;
481
+
261482 status = "disabled";
483
+
262484 };
263485
264486 &gmac1 {
....@@ -292,9 +514,7 @@
292514 * power-supply should switche to vcc3v3_lcd1_n
293515 * when mipi panel is connected to dsi1.
294516 */
295
-&gt1x {
296
- power-supply = <&vcc3v3_lcd0_n>;
297
-};
517
+
298518
299519 &i2c3 {
300520 status = "okay";
....@@ -313,7 +533,7 @@
313533 };
314534
315535 &i2c4 {
316
- status = "okay";
536
+ status = "disabled";
317537 gc8034: gc8034@37 {
318538 compatible = "galaxycore,gc8034";
319539 status = "okay";
....@@ -325,7 +545,6 @@
325545 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
326546 pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
327547 rockchip,grf = <&grf>;
328
- power-domains = <&power RK3568_PD_VI>;
329548 rockchip,camera-module-index = <0>;
330549 rockchip,camera-module-facing = "back";
331550 rockchip,camera-module-name = "RK-CMK-8M-2-v1";
....@@ -359,7 +578,7 @@
359578 };
360579 };
361580 ov5695: ov5695@36 {
362
- status = "okay";
581
+ status = "disabled";
363582 compatible = "ovti,ov5695";
364583 reg = <0x36>;
365584 clocks = <&cru CLK_CIF_OUT>;
....@@ -409,20 +628,14 @@
409628 };
410629 };
411630
412
-&video_phy0 {
413
- status = "okay";
414
-};
415631
416
-&video_phy1 {
417
- status = "disabled";
418
-};
419632
420633 &pcie30phy {
421634 status = "okay";
422635 };
423636
424
-&pcie3x2 {
425
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
637
+&pcie2x1 {
638
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
426639 vpcie3v3-supply = <&vcc3v3_pcie>;
427640 status = "okay";
428641 };
....@@ -437,7 +650,8 @@
437650 // };
438651 headphone {
439652 hp_det: hp-det {
440
- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
653
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
654
+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
441655 };
442656 };
443657
....@@ -452,6 +666,13 @@
452666 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
453667 };
454668 };
669
+
670
+ lcd1 {
671
+ lcd1_rst_gpio: lcd1-rst-gpio {
672
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
673
+ };
674
+ };
675
+
455676 nk_io_init{
456677 nk_io_gpio: nk-io-gpio{
457678 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
....@@ -465,27 +686,30 @@
465686 <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
466687 <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
467688 <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
468
- <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
469689 <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
470690 <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
471691 <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
472692 <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
473693 <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
694
+ <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
695
+ <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
696
+ <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
697
+ <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
474698 <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
475699 };
476700 };
477701 };
478702
479703 &rkisp {
480
- status = "okay";
704
+ status = "disabled";
481705 };
482706
483707 &rkisp_mmu {
484
- status = "okay";
708
+ status = "disabled";
485709 };
486710
487711 &rkisp_vir0 {
488
- status = "okay";
712
+ status = "disabled";
489713
490714 port {
491715 #address-cells = <1>;
....@@ -498,15 +722,7 @@
498722 };
499723 };
500724
501
-&route_dsi0 {
502
- status = "okay";
503
- connect = <&vp1_out_dsi0>;
504
-};
505725
506
-&route_edp {
507
- status = "okay";
508
- connect = <&vp0_out_edp>;
509
-};
510726
511727 &sata2 {
512728 status = "okay";
....@@ -545,12 +761,12 @@
545761 };
546762
547763 &vcc3v3_lcd0_n {
548
- gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
764
+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
549765 enable-active-high;
550766 };
551767
552768 &vcc3v3_lcd1_n {
553
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
769
+ gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
554770 enable-active-high;
555771 };
556772
....@@ -566,20 +782,25 @@
566782 clock-names = "ext_clock";
567783 //wifi-bt-power-toggle;
568784 uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
569
- BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
570785 pinctrl-names = "default", "rts_gpio";
571786 pinctrl-0 = <&uart1m0_rtsn>;
572787 pinctrl-1 = <&uart1_gpios>;
573
- BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
574
- BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
575
- BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
576
- status = "disabled";
788
+ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
789
+ BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
790
+ BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
791
+ status = "okay";
577792 };
578793
579794 &uart0 {
580795 status = "okay";
581796 };
582797
798
+&uart1 {
799
+ pinctrl-names = "default";
800
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
801
+ status = "okay";
802
+};
803
+
583804 &uart3 {
584805 status = "okay";
585806 pinctrl-0 = <&uart3m1_xfer>;