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hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d 
 kernel/arch/arm/kernel/hw_breakpoint.c
....@@ -1,16 +1,5 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program; if not, write to the Free Software
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- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
143  *
154  * Copyright (C) 2009, 2010 ARM Limited
165  *
....@@ -257,6 +246,9 @@
257246 	case ARM_DEBUG_ARCH_V7_ECP14:
258247 	case ARM_DEBUG_ARCH_V7_1:
259248 	case ARM_DEBUG_ARCH_V8:
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+	case ARM_DEBUG_ARCH_V8_1:
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+	case ARM_DEBUG_ARCH_V8_2:
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+	case ARM_DEBUG_ARCH_V8_4:
260252 		ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));
261253 		isb();
262254 		break;
....@@ -555,6 +547,7 @@
555547 		if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)
556548 			&& max_watchpoint_len >= 8)
557549 			break;
550
+		fallthrough;
558551 	default:
559552 		return -EINVAL;
560553 	}
....@@ -619,10 +612,12 @@
619612 		/* Allow halfword watchpoints and breakpoints. */
620613 		if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
621614 			break;
615
+		fallthrough;
622616 	case 3:
623617 		/* Allow single byte watchpoint. */
624618 		if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
625619 			break;
620
+		fallthrough;
626621 	default:
627622 		ret = -EINVAL;
628623 		goto out;
....@@ -933,6 +928,7 @@
933928 		break;
934929 	case ARM_ENTRY_ASYNC_WATCHPOINT:
935930 		WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
931
+		fallthrough;
936932 	case ARM_ENTRY_SYNC_WATCHPOINT:
937933 		watchpoint_handler(addr, fsr, regs);
938934 		break;
....@@ -981,6 +977,7 @@
981977 		ARM_DBG_READ(c1, c1, 4, oslsr);
982978 		if (oslsr & ARM_OSLSR_OSLM0)
983979 			return true;
980
+		fallthrough;
984981 	default:
985982 		return false;
986983 	}