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| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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1 | 2 | /* |
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2 | 3 | * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board |
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3 | 4 | * |
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4 | 5 | * Copyright (c) 2017, Microchip Technology Inc. |
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5 | 6 | * 2017 Cristian Birsan <cristian.birsan@microchip.com> |
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6 | 7 | * 2017 Claudiu Beznea <claudiu.beznea@microchip.com> |
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7 | | - * |
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8 | | - * This file is dual-licensed: you can use it either under the terms |
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9 | | - * of the GPL or the X11 license, at your option. Note that this dual |
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10 | | - * licensing only applies to this file, and not this project as a |
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11 | | - * whole. |
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12 | | - * |
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13 | | - * a) This file is free software; you can redistribute it and/or |
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14 | | - * modify it under the terms of the GNU General Public License as |
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15 | | - * published by the Free Software Foundation; either version 2 of the |
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16 | | - * License, or (at your option) any later version. |
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17 | | - * |
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18 | | - * This file is distributed in the hope that it will be useful, |
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19 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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20 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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21 | | - * GNU General Public License for more details. |
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22 | | - * |
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23 | | - * Or, alternatively, |
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24 | | - * |
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25 | | - * b) Permission is hereby granted, free of charge, to any person |
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26 | | - * obtaining a copy of this software and associated documentation |
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27 | | - * files (the "Software"), to deal in the Software without |
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28 | | - * restriction, including without limitation the rights to use, |
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29 | | - * copy, modify, merge, publish, distribute, sublicense, and/or |
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30 | | - * sell copies of the Software, and to permit persons to whom the |
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31 | | - * Software is furnished to do so, subject to the following |
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32 | | - * conditions: |
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33 | | - * |
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34 | | - * The above copyright notice and this permission notice shall be |
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35 | | - * included in all copies or substantial portions of the Software. |
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36 | | - * |
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37 | | - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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38 | | - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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39 | | - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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40 | | - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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41 | | - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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42 | | - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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43 | | - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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44 | | - * OTHER DEALINGS IN THE SOFTWARE. |
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45 | 8 | */ |
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46 | 9 | #include "sama5d2.dtsi" |
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47 | 10 | #include "sama5d2-pinfunc.h" |
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.. | .. |
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49 | 12 | / { |
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50 | 13 | model = "Atmel SAMA5D27 SoM1"; |
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51 | 14 | compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; |
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| 15 | + |
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| 16 | + aliases { |
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| 17 | + i2c0 = &i2c0; |
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| 18 | + }; |
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52 | 19 | |
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53 | 20 | clocks { |
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54 | 21 | slow_xtal { |
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.. | .. |
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61 | 28 | }; |
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62 | 29 | |
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63 | 30 | ahb { |
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| 31 | + sdmmc0: sdio-host@a0000000 { |
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| 32 | + microchip,sdcal-inverted; |
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| 33 | + }; |
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| 34 | + |
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64 | 35 | apb { |
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| 36 | + qspi1: spi@f0024000 { |
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| 37 | + pinctrl-names = "default"; |
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| 38 | + pinctrl-0 = <&pinctrl_qspi1_default>; |
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| 39 | + |
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| 40 | + flash@0 { |
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| 41 | + #address-cells = <1>; |
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| 42 | + #size-cells = <1>; |
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| 43 | + compatible = "jedec,spi-nor"; |
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| 44 | + reg = <0>; |
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| 45 | + spi-max-frequency = <80000000>; |
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| 46 | + spi-tx-bus-width = <4>; |
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| 47 | + spi-rx-bus-width = <4>; |
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| 48 | + m25p,fast-read; |
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| 49 | + |
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| 50 | + at91bootstrap@00000000 { |
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| 51 | + label = "at91bootstrap"; |
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| 52 | + reg = <0x00000000 0x00040000>; |
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| 53 | + }; |
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| 54 | + |
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| 55 | + bootloader@00040000 { |
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| 56 | + label = "bootloader"; |
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| 57 | + reg = <0x00040000 0x000c0000>; |
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| 58 | + }; |
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| 59 | + |
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| 60 | + bootloaderenvred@00100000 { |
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| 61 | + label = "bootloader env redundant"; |
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| 62 | + reg = <0x00100000 0x00040000>; |
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| 63 | + }; |
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| 64 | + |
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| 65 | + bootloaderenv@00140000 { |
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| 66 | + label = "bootloader env"; |
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| 67 | + reg = <0x00140000 0x00040000>; |
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| 68 | + }; |
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| 69 | + |
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| 70 | + dtb@00180000 { |
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| 71 | + label = "device tree"; |
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| 72 | + reg = <0x00180000 0x00080000>; |
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| 73 | + }; |
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| 74 | + |
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| 75 | + kernel@00200000 { |
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| 76 | + label = "kernel"; |
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| 77 | + reg = <0x00200000 0x00600000>; |
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| 78 | + }; |
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| 79 | + }; |
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| 80 | + }; |
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| 81 | + |
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65 | 82 | macb0: ethernet@f8008000 { |
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66 | 83 | pinctrl-names = "default"; |
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67 | 84 | pinctrl-0 = <&pinctrl_macb0_default>; |
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.. | .. |
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76 | 93 | }; |
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77 | 94 | }; |
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78 | 95 | |
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| 96 | + i2c0: i2c@f8028000 { |
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| 97 | + dmas = <0>, <0>; |
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| 98 | + pinctrl-names = "default"; |
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| 99 | + pinctrl-0 = <&pinctrl_i2c0_default>; |
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| 100 | + status = "okay"; |
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| 101 | + |
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| 102 | + at24@50 { |
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| 103 | + compatible = "24c02"; |
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| 104 | + reg = <0x50>; |
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| 105 | + pagesize = <8>; |
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| 106 | + }; |
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| 107 | + }; |
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| 108 | + |
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79 | 109 | pinctrl@fc038000 { |
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| 110 | + pinctrl_i2c0_default: i2c0_default { |
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| 111 | + pinmux = <PIN_PD21__TWD0>, |
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| 112 | + <PIN_PD22__TWCK0>; |
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| 113 | + bias-disable; |
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| 114 | + }; |
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| 115 | + |
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| 116 | + pinctrl_qspi1_default: qspi1_default { |
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| 117 | + sck_cs { |
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| 118 | + pinmux = <PIN_PB5__QSPI1_SCK>, |
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| 119 | + <PIN_PB6__QSPI1_CS>; |
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| 120 | + bias-disable; |
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| 121 | + }; |
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| 122 | + |
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| 123 | + data { |
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| 124 | + pinmux = <PIN_PB7__QSPI1_IO0>, |
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| 125 | + <PIN_PB8__QSPI1_IO1>, |
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| 126 | + <PIN_PB9__QSPI1_IO2>, |
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| 127 | + <PIN_PB10__QSPI1_IO3>; |
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| 128 | + bias-pull-up; |
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| 129 | + }; |
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| 130 | + }; |
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80 | 131 | |
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81 | 132 | pinctrl_macb0_default: macb0_default { |
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82 | 133 | pinmux = <PIN_PD9__GTXCK>, |
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