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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d

 kernel/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
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 ARM Freescale DSPI controller
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 Required properties:
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-- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi",
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-		"fsl,ls2085a-dspi"
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-		or
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-		"fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
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-		"fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
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+- compatible : must be one of:
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+	"fsl,vf610-dspi",
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+	"fsl,ls1021a-v1.0-dspi",
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+	"fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
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+	"fsl,ls1028a-dspi",
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+	"fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
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+	"fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
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+	"fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
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+	"fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"),
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+	"fsl,ls2085a-dspi",
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+	"fsl,lx2160a-dspi",
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 - reg : Offset and length of the register set for the device
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 - interrupts : Should contain SPI controller interrupt
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 - clocks: from common clock binding: handle to dspi clock.
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 - pinctrl-0: pin control group to be used for this controller.
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 - pinctrl-names: must contain a "default" entry.
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 - spi-num-chipselects : the number of the chipselect signals.
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-- bus-num : the slave chip chipselect signal number.
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 Optional property:
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 - big-endian: If present the dspi device's registers are implemented
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   in big endian mode.
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+- bus-num : the slave chip chipselect signal number.
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 Optional SPI slave node properties:
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 - fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip