hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
....@@ -4,8 +4,11 @@
44 2 USB PHY contains.
55
66 Required properties:
7
-- compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
7
+- compatible: "renesas,usb-phy-r8a7742" if the device is a part of R8A7742 SoC.
8
+ "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
9
+ "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC.
810 "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
11
+ "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC.
912 "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
1013 "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
1114 "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
....@@ -29,7 +32,7 @@
2932 - #phy-cells: see phy-bindings.txt in the same directory, must be <1>.
3033
3134 The phandle's argument in the PHY specifier is the USB controller selector for
32
-the USB channel; see the selector meanings below:
35
+the USB channel other than r8a77470 SoC; see the selector meanings below:
3336
3437 +-----------+---------------+---------------+
3538 |\ Selector | | |
....@@ -40,6 +43,16 @@
4043 | 2 | PCI EHCI/OHCI | xHCI |
4144 +-----------+---------------+---------------+
4245
46
+For r8a77470 SoC;see the selector meaning below:
47
+
48
++-----------+---------------+---------------+
49
+|\ Selector | | |
50
++ --------- + 0 | 1 |
51
+| Channel \| | |
52
++-----------+---------------+---------------+
53
+| 0 | EHCI/OHCI | HS-USB |
54
++-----------+---------------+---------------+
55
+
4356 Example (Lager board):
4457
4558 usb-phy@e6590100 {
....@@ -47,15 +60,53 @@
4760 reg = <0 0xe6590100 0 0x100>;
4861 #address-cells = <1>;
4962 #size-cells = <0>;
50
- clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
63
+ clocks = <&cpg CPG_MOD 704>;
5164 clock-names = "usbhs";
65
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
66
+ resets = <&cpg 704>;
5267
53
- usb-channel@0 {
68
+ usb0: usb-channel@0 {
5469 reg = <0>;
5570 #phy-cells = <1>;
5671 };
57
- usb-channel@2 {
72
+ usb2: usb-channel@2 {
5873 reg = <2>;
5974 #phy-cells = <1>;
6075 };
6176 };
77
+
78
+Example (iWave RZ/G1C sbc):
79
+
80
+ usbphy0: usb-phy0@e6590100 {
81
+ compatible = "renesas,usb-phy-r8a77470",
82
+ "renesas,rcar-gen2-usb-phy";
83
+ reg = <0 0xe6590100 0 0x100>;
84
+ #address-cells = <1>;
85
+ #size-cells = <0>;
86
+ clocks = <&cpg CPG_MOD 704>;
87
+ clock-names = "usbhs";
88
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
89
+ resets = <&cpg 704>;
90
+
91
+ usb0: usb-channel@0 {
92
+ reg = <0>;
93
+ #phy-cells = <1>;
94
+ };
95
+ };
96
+
97
+ usbphy1: usb-phy@e6598100 {
98
+ compatible = "renesas,usb-phy-r8a77470",
99
+ "renesas,rcar-gen2-usb-phy";
100
+ reg = <0 0xe6598100 0 0x100>;
101
+ #address-cells = <1>;
102
+ #size-cells = <0>;
103
+ clocks = <&cpg CPG_MOD 706>;
104
+ clock-names = "usbhs";
105
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
106
+ resets = <&cpg 706>;
107
+
108
+ usb1: usb-channel@0 {
109
+ reg = <0>;
110
+ #phy-cells = <1>;
111
+ };
112
+ };