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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d

 kernel/Documentation/devicetree/bindings/pci/qcom,pcie.txt
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@@ -5,11 +5,14 @@
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 	Value type: <stringlist>
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 	Definition: Value should contain
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 			- "qcom,pcie-ipq8064" for ipq8064
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+			- "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
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 			- "qcom,pcie-apq8064" for apq8064
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 			- "qcom,pcie-apq8084" for apq8084
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 			- "qcom,pcie-msm8996" for msm8996 or apq8096
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 			- "qcom,pcie-ipq4019" for ipq4019
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 			- "qcom,pcie-ipq8074" for ipq8074
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+			- "qcom,pcie-qcs404" for qcs404
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+			- "qcom,pcie-sdm845" for sdm845
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 - reg:
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 	Usage: required
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@@ -88,6 +91,8 @@
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 	Definition: Should contain the following entries
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 			- "core"	Clocks the pcie hw block
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 			- "phy"		Clocks the pcie PHY block
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+			- "aux" 	Clocks the pcie AUX block
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+			- "ref" 	Clocks the pcie ref block
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 - clock-names:
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 	Usage: required for apq8084/ipq4019
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 	Value type: <stringlist>
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@@ -115,6 +120,27 @@
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 			- "axi_s"	AXI Slave clock
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 			- "ahb"		AHB clock
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 			- "aux"		Auxiliary clock
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+
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+- clock-names:
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+	Usage: required for qcs404
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+	Value type: <stringlist>
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+	Definition: Should contain the following entries
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+			- "iface"	AHB clock
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+			- "aux"		Auxiliary clock
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+			- "master_bus"	AXI Master clock
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+			- "slave_bus"	AXI Slave clock
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+
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+-clock-names:
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+	Usage: required for sdm845
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+	Value type: <stringlist>
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+	Definition: Should contain the following entries
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+			- "aux"		Auxiliary clock
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+			- "cfg"		Configuration clock
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+			- "bus_master"	Master AXI clock
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+			- "bus_slave"	Slave AXI clock
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+			- "slave_q2a"	Slave Q2A clock
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+			- "tbu"		PCIe TBU clock
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+			- "pipe"	PIPE clock
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 - resets:
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 	Usage: required
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@@ -154,6 +180,7 @@
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 			- "pwr"			PWR reset
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 			- "ahb"			AHB reset
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 			- "phy_ahb"		PHY AHB reset
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+			- "ext"			EXT reset
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 - reset-names:
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 	Usage: required for ipq8074
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@@ -166,6 +193,23 @@
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 			- "axi_s"		AXI Slave reset
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 			- "ahb"			AHB Reset
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 			- "axi_m_sticky"	AXI Master Sticky reset
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+
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+- reset-names:
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+	Usage: required for qcs404
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+	Value type: <stringlist>
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+	Definition: Should contain the following entries
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+			- "axi_m"		AXI Master reset
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+			- "axi_s"		AXI Slave reset
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+			- "axi_m_sticky"	AXI Master Sticky reset
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+			- "pipe_sticky"		PIPE sticky reset
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+			- "pwr"			PWR reset
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+			- "ahb"			AHB reset
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+
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+- reset-names:
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+	Usage: required for sdm845
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+	Value type: <stringlist>
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+	Definition: Should contain the following entries
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+			- "pci"			PCIe core reset
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 - power-domains:
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 	Usage: required for apq8084 and msm8996/apq8096
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@@ -195,12 +239,12 @@
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 	Definition: A phandle to the PCIe endpoint power supply
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 - phys:
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-	Usage: required for apq8084
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+	Usage: required for apq8084 and qcs404
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 	Value type: <phandle>
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 	Definition: List of phandle(s) as listed in phy-names property
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 - phy-names:
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-	Usage: required for apq8084
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+	Usage: required for apq8084 and qcs404
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 	Value type: <stringlist>
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 	Definition: Should contain "pciephy"
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..
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@@ -237,14 +281,17 @@
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 				<0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
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 		clocks = <&gcc PCIE_A_CLK>,
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 			 <&gcc PCIE_H_CLK>,
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-			 <&gcc PCIE_PHY_CLK>;
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-		clock-names = "core", "iface", "phy";
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+			 <&gcc PCIE_PHY_CLK>,
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+			 <&gcc PCIE_AUX_CLK>,
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+			 <&gcc PCIE_ALT_REF_CLK>;
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+		clock-names = "core", "iface", "phy", "aux", "ref";
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 		resets = <&gcc PCIE_ACLK_RESET>,
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 			 <&gcc PCIE_HCLK_RESET>,
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 			 <&gcc PCIE_POR_RESET>,
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 			 <&gcc PCIE_PCI_RESET>,
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-			 <&gcc PCIE_PHY_RESET>;
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-		reset-names = "axi", "ahb", "por", "pci", "phy";
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+			 <&gcc PCIE_PHY_RESET>,
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+			 <&gcc PCIE_EXT_RESET>;
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+		reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
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 		pinctrl-0 = <&pcie_pins_default>;
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 		pinctrl-names = "default";
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 	};