hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/Documentation/devicetree/bindings/pci/designware-pcie.txt
....@@ -4,11 +4,13 @@
44 - compatible:
55 "snps,dw-pcie" for RC mode;
66 "snps,dw-pcie-ep" for EP mode;
7
-- reg: Should contain the configuration address space.
8
-- reg-names: Must be "config" for the PCIe configuration space.
7
+- reg: For designware cores version < 4.80 contains the configuration
8
+ address space. For designware core version >= 4.80, contains
9
+ the configuration and ATU address space
10
+- reg-names: Must be "config" for the PCIe configuration space and "atu" for
11
+ the ATU address space.
912 (The old way of getting the configuration address space from "ranges"
1013 is deprecated and should be avoided.)
11
-- num-lanes: number of lanes to use
1214 RC mode:
1315 - #address-cells: set to <3>
1416 - #size-cells: set to <2>
....@@ -31,6 +33,11 @@
3133 - clock-names: Must include the following entries:
3234 - "pcie"
3335 - "pcie_bus"
36
+- snps,enable-cdm-check: This is a boolean property and if present enables
37
+ automatic checking of CDM (Configuration Dependent Module) registers
38
+ for data corruption. CDM registers include standard PCIe configuration
39
+ space registers, Port Logic registers, DMA and iATU (internal Address
40
+ Translation Unit) registers.
3441 RC mode:
3542 - num-viewport: number of view ports configured in hardware. If a platform
3643 does not specify it, the driver assumes 2.