hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt
....@@ -5,17 +5,29 @@
55 sdhci-of-at91 driver.
66
77 Required properties:
8
-- compatible: Must be "atmel,sama5d2-sdhci".
8
+- compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci".
99 - clocks: Phandlers to the clocks.
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-- clock-names: Must be "hclock", "multclk", "baseclk";
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+- clock-names: Must be "hclock", "multclk", "baseclk" for
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+ "atmel,sama5d2-sdhci".
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+ Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".
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+Optional properties:
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+- assigned-clocks: The same with "multclk".
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+- assigned-clock-rates The rate of "multclk" in order to not rely on the
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+ gck configuration set by previous components.
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+- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is
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+ inverted. The default polarity for this signal is described in the datasheet.
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+ For instance on SAMA5D2, the pin is usually tied to the GND with a resistor
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+ and a capacitor (see "SDMMC I/O Calibration" chapter).
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1323 Example:
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-sdmmc0: sdio-host@a0000000 {
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+mmc0: sdio-host@a0000000 {
1626 compatible = "atmel,sama5d2-sdhci";
1727 reg = <0xa0000000 0x300>;
1828 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
1929 clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
2030 clock-names = "hclock", "multclk", "baseclk";
31
+ assigned-clocks = <&sdmmc0_gclk>;
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+ assigned-clock-rates = <480000000>;
2133 };