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5 | 5 | sdhci-of-at91 driver. |
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6 | 6 | |
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7 | 7 | Required properties: |
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8 | | -- compatible: Must be "atmel,sama5d2-sdhci". |
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| 8 | +- compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci". |
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9 | 9 | - clocks: Phandlers to the clocks. |
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10 | | -- clock-names: Must be "hclock", "multclk", "baseclk"; |
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| 10 | +- clock-names: Must be "hclock", "multclk", "baseclk" for |
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| 11 | + "atmel,sama5d2-sdhci". |
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| 12 | + Must be "hclock", "multclk" for "microchip,sam9x60-sdhci". |
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11 | 13 | |
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| 14 | +Optional properties: |
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| 15 | +- assigned-clocks: The same with "multclk". |
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| 16 | +- assigned-clock-rates The rate of "multclk" in order to not rely on the |
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| 17 | + gck configuration set by previous components. |
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| 18 | +- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is |
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| 19 | + inverted. The default polarity for this signal is described in the datasheet. |
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| 20 | + For instance on SAMA5D2, the pin is usually tied to the GND with a resistor |
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| 21 | + and a capacitor (see "SDMMC I/O Calibration" chapter). |
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12 | 22 | |
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13 | 23 | Example: |
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14 | 24 | |
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15 | | -sdmmc0: sdio-host@a0000000 { |
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| 25 | +mmc0: sdio-host@a0000000 { |
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16 | 26 | compatible = "atmel,sama5d2-sdhci"; |
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17 | 27 | reg = <0xa0000000 0x300>; |
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18 | 28 | interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; |
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19 | 29 | clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>; |
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20 | 30 | clock-names = "hclock", "multclk", "baseclk"; |
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| 31 | + assigned-clocks = <&sdmmc0_gclk>; |
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| 32 | + assigned-clock-rates = <480000000>; |
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21 | 33 | }; |
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