.. | .. |
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5 | 5 | - "ti,omap2-gpio" for OMAP2 controllers |
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6 | 6 | - "ti,omap3-gpio" for OMAP3 controllers |
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7 | 7 | - "ti,omap4-gpio" for OMAP4 controllers |
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| 8 | +- reg : Physical base address of the controller and length of memory mapped |
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| 9 | + region. |
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8 | 10 | - gpio-controller : Marks the device node as a GPIO controller. |
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9 | 11 | - #gpio-cells : Should be two. |
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10 | 12 | - first cell is the pin number |
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.. | .. |
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18 | 20 | 2 = high-to-low edge triggered. |
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19 | 21 | 4 = active high level-sensitive. |
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20 | 22 | 8 = active low level-sensitive. |
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| 23 | +- interrupts : The interrupt the controller is rising as output when an |
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| 24 | + interrupt occures |
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21 | 25 | |
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22 | 26 | OMAP specific properties: |
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23 | 27 | - ti,hwmods: Name of the hwmod associated to the GPIO: |
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.. | .. |
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29 | 33 | |
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30 | 34 | Example: |
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31 | 35 | |
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32 | | -gpio4: gpio4 { |
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| 36 | +gpio0: gpio@44e07000 { |
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33 | 37 | compatible = "ti,omap4-gpio"; |
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34 | | - ti,hwmods = "gpio4"; |
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| 38 | + reg = <0x44e07000 0x1000>; |
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| 39 | + ti,hwmods = "gpio1"; |
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35 | 40 | gpio-controller; |
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36 | 41 | #gpio-cells = <2>; |
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37 | 42 | interrupt-controller; |
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38 | 43 | #interrupt-cells = <2>; |
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| 44 | + interrupts = <96>; |
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39 | 45 | }; |
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