kernel/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
.. .. @@ -11,6 +11,8 @@ 11 11 "st,stm32f42xx-rcc" 12 12 "st,stm32f469-rcc" 13 13 "st,stm32f746-rcc" 14 + "st,stm32f769-rcc"15 +14 16 - reg: should be register base and length as documented in the 15 17 datasheet 16 18 - #reset-cells: 1, see below .. .. @@ -102,6 +104,10 @@ 102 104 28 CLK_I2C3 103 105 29 CLK_I2C4 104 106 30 CLK_LPTIMER (LPTimer1 clock) 107 + 31 CLK_PLL_SRC108 + 32 CLK_DFSDM1109 + 33 CLK_ADFSDM1110 + 34 CLK_F769_DSI105 111 ) 106 112 107 113 Example: