hc
2023-12-08 01573e231f18eb2d99162747186f59511f56b64d
kernel/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt
....@@ -4,9 +4,15 @@
44 controllers within the SoC and also implements a reset controller for SoC
55 peripherals.
66
7
+A revision of this SoC is available: rk3288w. The clock tree is a bit
8
+different so another dt-compatible is available. Noticed that it is only
9
+setting the difference but there is no automatic revision detection. This
10
+should be performed by bootloaders.
11
+
712 Required Properties:
813
9
-- compatible: should be "rockchip,rk3288-cru"
14
+- compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in
15
+ case of this revision of Rockchip rk3288.
1016 - reg: physical base address of the controller and length of memory mapped
1117 region.
1218 - #clock-cells: should be 1.