.. | .. |
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4 | 4 | controllers within the SoC and also implements a reset controller for SoC |
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5 | 5 | peripherals. |
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6 | 6 | |
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| 7 | +A revision of this SoC is available: rk3288w. The clock tree is a bit |
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| 8 | +different so another dt-compatible is available. Noticed that it is only |
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| 9 | +setting the difference but there is no automatic revision detection. This |
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| 10 | +should be performed by bootloaders. |
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| 11 | + |
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7 | 12 | Required Properties: |
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8 | 13 | |
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9 | | -- compatible: should be "rockchip,rk3288-cru" |
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| 14 | +- compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in |
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| 15 | + case of this revision of Rockchip rk3288. |
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10 | 16 | - reg: physical base address of the controller and length of memory mapped |
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11 | 17 | region. |
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12 | 18 | - #clock-cells: should be 1. |
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