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2023-12-08 01573e231f18eb2d99162747186f59511f56b64d

 kernel/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
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@@ -9,14 +9,17 @@
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 	- "amlogic,meson8-clkc" for Meson8 (S802) SoCs
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 	- "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
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 	- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
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-- reg: it must be composed by two tuples:
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-	0) physical base address of the xtal register and length of memory
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-	   mapped region.
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-	1) physical base address of the clock controller and length of memory
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-	   mapped region.
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-
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 - #clock-cells: should be 1.
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 - #reset-cells: should be 1.
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+- clocks: list of clock phandles, one for each entry in clock-names
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+- clock-names: should contain the following:
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+  * "xtal": the 24MHz system oscillator
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+  * "ddr_pll": the DDR PLL clock
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+  * "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)
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+
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+Parent node should have the following properties :
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+- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
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+- reg: base address and size of the HHI system control register space.
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 Each clock is assigned an identifier and client nodes can use this identifier
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 to specify the clock which they consume. All available clocks are defined as
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@@ -30,9 +33,8 @@
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 Example: Clock controller node:
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-	clkc: clock-controller@c1104000 {
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+	clkc: clock-controller {
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 		compatible = "amlogic,meson8b-clkc";
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-		reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
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 		#clock-cells = <1>;
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 		#reset-cells = <1>;
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 	};