/*
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* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifdef DRV_I915
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#include <assert.h>
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#include <errno.h>
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#include <i915_drm.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <xf86drm.h>
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#include "drv_priv.h"
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#include "helpers.h"
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#include "util.h"
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#define I915_CACHELINE_SIZE 64
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#define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
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static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB1555,
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DRM_FORMAT_ARGB8888, DRM_FORMAT_BGR888,
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DRM_FORMAT_RGB565, DRM_FORMAT_XBGR2101010,
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DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
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DRM_FORMAT_XRGB2101010, DRM_FORMAT_XRGB8888 };
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static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8,
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DRM_FORMAT_UYVY, DRM_FORMAT_YUYV };
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static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID,
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DRM_FORMAT_NV12 };
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struct i915_device {
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uint32_t gen;
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int32_t has_llc;
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};
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static uint32_t i915_get_gen(int device_id)
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{
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const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
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0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
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unsigned i;
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for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
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if (gen3_ids[i] == device_id)
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return 3;
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return 4;
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}
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/*
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* We allow allocation of ARGB formats for SCANOUT if the corresponding XRGB
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* formats supports it. It's up to the caller (chrome ozone) to ultimately not
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* scan out ARGB if the display controller only supports XRGB, but we'll allow
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* the allocation of the bo here.
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*/
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static bool format_compatible(const struct combination *combo, uint32_t format)
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{
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if (combo->format == format)
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return true;
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switch (format) {
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case DRM_FORMAT_XRGB8888:
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return combo->format == DRM_FORMAT_ARGB8888;
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case DRM_FORMAT_XBGR8888:
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return combo->format == DRM_FORMAT_ABGR8888;
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case DRM_FORMAT_RGBX8888:
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return combo->format == DRM_FORMAT_RGBA8888;
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case DRM_FORMAT_BGRX8888:
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return combo->format == DRM_FORMAT_BGRA8888;
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default:
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return false;
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}
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}
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static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
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{
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uint32_t i;
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struct combination *combo;
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/*
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* Older hardware can't scanout Y-tiled formats. Newer devices can, and
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* report this functionality via format modifiers.
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*/
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for (i = 0; i < drv_array_size(drv->combos); i++) {
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combo = (struct combination *)drv_array_at_idx(drv->combos, i);
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if (!format_compatible(combo, item->format))
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continue;
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if (item->modifier == DRM_FORMAT_MOD_LINEAR &&
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combo->metadata.tiling == I915_TILING_X) {
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/*
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* FIXME: drv_query_kms() does not report the available modifiers
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* yet, but we know that all hardware can scanout from X-tiled
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* buffers, so let's add this to our combinations, except for
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* cursor, which must not be tiled.
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*/
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combo->use_flags |= item->use_flags & ~BO_USE_CURSOR;
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}
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/* If we can scanout NV12, we support all tiling modes. */
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if (item->format == DRM_FORMAT_NV12)
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combo->use_flags |= item->use_flags;
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if (combo->metadata.modifier == item->modifier)
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combo->use_flags |= item->use_flags;
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}
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return 0;
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}
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static int i915_add_combinations(struct driver *drv)
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{
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int ret;
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uint32_t i;
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struct drv_array *kms_items;
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struct format_metadata metadata;
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uint64_t render_use_flags, texture_use_flags;
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render_use_flags = BO_USE_RENDER_MASK;
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texture_use_flags = BO_USE_TEXTURE_MASK;
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metadata.tiling = I915_TILING_NONE;
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metadata.priority = 1;
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metadata.modifier = DRM_FORMAT_MOD_LINEAR;
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drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
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&metadata, render_use_flags);
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drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
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&metadata, texture_use_flags);
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drv_add_combinations(drv, tileable_texture_source_formats,
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ARRAY_SIZE(tileable_texture_source_formats), &metadata,
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texture_use_flags);
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drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
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drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
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/* IPU3 camera ISP supports only NV12 output. */
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drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
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BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
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/*
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* R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
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* from camera.
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*/
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drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
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BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
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render_use_flags &= ~BO_USE_RENDERSCRIPT;
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render_use_flags &= ~BO_USE_SW_WRITE_OFTEN;
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render_use_flags &= ~BO_USE_SW_READ_OFTEN;
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render_use_flags &= ~BO_USE_LINEAR;
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texture_use_flags &= ~BO_USE_RENDERSCRIPT;
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texture_use_flags &= ~BO_USE_SW_WRITE_OFTEN;
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texture_use_flags &= ~BO_USE_SW_READ_OFTEN;
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texture_use_flags &= ~BO_USE_LINEAR;
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metadata.tiling = I915_TILING_X;
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metadata.priority = 2;
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metadata.modifier = I915_FORMAT_MOD_X_TILED;
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drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
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&metadata, render_use_flags);
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drv_add_combinations(drv, tileable_texture_source_formats,
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ARRAY_SIZE(tileable_texture_source_formats), &metadata,
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texture_use_flags);
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metadata.tiling = I915_TILING_Y;
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metadata.priority = 3;
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metadata.modifier = I915_FORMAT_MOD_Y_TILED;
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drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
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&metadata, render_use_flags);
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drv_add_combinations(drv, tileable_texture_source_formats,
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ARRAY_SIZE(tileable_texture_source_formats), &metadata,
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texture_use_flags);
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/* Support y-tiled NV12 for libva */
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const uint32_t nv12_format = DRM_FORMAT_NV12;
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drv_add_combinations(drv, &nv12_format, 1, &metadata,
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BO_USE_TEXTURE | BO_USE_HW_VIDEO_DECODER);
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kms_items = drv_query_kms(drv);
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if (!kms_items)
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return 0;
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for (i = 0; i < drv_array_size(kms_items); i++) {
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ret = i915_add_kms_item(drv, (struct kms_item *)drv_array_at_idx(kms_items, i));
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if (ret) {
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drv_array_destroy(kms_items);
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return ret;
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}
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}
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drv_array_destroy(kms_items);
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return 0;
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}
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static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
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uint32_t *aligned_height)
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{
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struct i915_device *i915 = bo->drv->priv;
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uint32_t horizontal_alignment;
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uint32_t vertical_alignment;
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switch (tiling) {
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default:
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case I915_TILING_NONE:
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/*
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* The Intel GPU doesn't need any alignment in linear mode,
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* but libva requires the allocation stride to be aligned to
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* 16 bytes and height to 4 rows. Further, we round up the
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* horizontal alignment so that row start on a cache line (64
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* bytes).
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*/
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horizontal_alignment = 64;
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vertical_alignment = 4;
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break;
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case I915_TILING_X:
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horizontal_alignment = 512;
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vertical_alignment = 8;
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break;
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case I915_TILING_Y:
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if (i915->gen == 3) {
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horizontal_alignment = 512;
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vertical_alignment = 8;
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} else {
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horizontal_alignment = 128;
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vertical_alignment = 32;
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}
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break;
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}
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*aligned_height = ALIGN(bo->height, vertical_alignment);
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if (i915->gen > 3) {
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*stride = ALIGN(*stride, horizontal_alignment);
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} else {
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while (*stride > horizontal_alignment)
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horizontal_alignment <<= 1;
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*stride = horizontal_alignment;
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}
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if (i915->gen <= 3 && *stride > 8192)
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return -EINVAL;
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return 0;
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}
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static void i915_clflush(void *start, size_t size)
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{
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void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
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void *end = (void *)((uintptr_t)start + size);
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__builtin_ia32_mfence();
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while (p < end) {
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__builtin_ia32_clflush(p);
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p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
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}
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}
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static int i915_init(struct driver *drv)
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{
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int ret;
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int device_id;
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struct i915_device *i915;
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drm_i915_getparam_t get_param;
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i915 = calloc(1, sizeof(*i915));
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if (!i915)
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return -ENOMEM;
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memset(&get_param, 0, sizeof(get_param));
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get_param.param = I915_PARAM_CHIPSET_ID;
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get_param.value = &device_id;
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ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
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if (ret) {
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drv_log("Failed to get I915_PARAM_CHIPSET_ID\n");
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free(i915);
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return -EINVAL;
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}
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i915->gen = i915_get_gen(device_id);
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memset(&get_param, 0, sizeof(get_param));
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get_param.param = I915_PARAM_HAS_LLC;
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get_param.value = &i915->has_llc;
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ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
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if (ret) {
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drv_log("Failed to get I915_PARAM_HAS_LLC\n");
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free(i915);
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return -EINVAL;
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}
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drv->priv = i915;
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return i915_add_combinations(drv);
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}
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static int i915_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, uint32_t format)
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{
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uint32_t offset;
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size_t plane;
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int ret;
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offset = 0;
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for (plane = 0; plane < drv_num_planes_from_format(format); plane++) {
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uint32_t stride = drv_stride_from_format(format, width, plane);
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uint32_t plane_height = drv_height_from_format(format, height, plane);
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if (bo->tiling != I915_TILING_NONE)
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assert(IS_ALIGNED(offset, 4096));
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ret = i915_align_dimensions(bo, bo->tiling, &stride, &plane_height);
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if (ret)
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return ret;
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bo->strides[plane] = stride;
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bo->sizes[plane] = stride * plane_height;
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bo->offsets[plane] = offset;
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offset += bo->sizes[plane];
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}
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bo->total_size = offset;
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return 0;
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}
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static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t height,
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uint32_t format, uint64_t modifier)
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{
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int ret;
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size_t plane;
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struct drm_i915_gem_create gem_create;
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struct drm_i915_gem_set_tiling gem_set_tiling;
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switch (modifier) {
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case DRM_FORMAT_MOD_LINEAR:
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bo->tiling = I915_TILING_NONE;
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break;
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case I915_FORMAT_MOD_X_TILED:
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bo->tiling = I915_TILING_X;
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break;
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case I915_FORMAT_MOD_Y_TILED:
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bo->tiling = I915_TILING_Y;
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break;
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}
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bo->format_modifiers[0] = modifier;
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if (format == DRM_FORMAT_YVU420_ANDROID) {
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/*
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* We only need to be able to use this as a linear texture,
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* which doesn't put any HW restrictions on how we lay it
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* out. The Android format does require the stride to be a
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* multiple of 16 and expects the Cr and Cb stride to be
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* ALIGN(Y_stride / 2, 16), which we can make happen by
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* aligning to 32 bytes here.
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*/
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uint32_t stride = ALIGN(width, 32);
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drv_bo_from_format(bo, stride, height, format);
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} else {
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i915_bo_from_format(bo, width, height, format);
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}
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memset(&gem_create, 0, sizeof(gem_create));
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gem_create.size = bo->total_size;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
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if (ret) {
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drv_log("DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", gem_create.size);
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return ret;
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}
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for (plane = 0; plane < bo->num_planes; plane++)
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bo->handles[plane].u32 = gem_create.handle;
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memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
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gem_set_tiling.handle = bo->handles[0].u32;
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gem_set_tiling.tiling_mode = bo->tiling;
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gem_set_tiling.stride = bo->strides[0];
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
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if (ret) {
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struct drm_gem_close gem_close;
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memset(&gem_close, 0, sizeof(gem_close));
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gem_close.handle = bo->handles[0].u32;
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drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
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drv_log("DRM_IOCTL_I915_GEM_SET_TILING failed with %d\n", errno);
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return -errno;
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}
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return 0;
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}
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static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
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uint64_t use_flags)
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{
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struct combination *combo;
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combo = drv_get_combination(bo->drv, format, use_flags);
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if (!combo)
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return -EINVAL;
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return i915_bo_create_for_modifier(bo, width, height, format, combo->metadata.modifier);
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}
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static int i915_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
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uint32_t format, const uint64_t *modifiers, uint32_t count)
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{
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static const uint64_t modifier_order[] = {
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I915_FORMAT_MOD_Y_TILED,
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I915_FORMAT_MOD_X_TILED,
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DRM_FORMAT_MOD_LINEAR,
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};
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uint64_t modifier;
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modifier = drv_pick_modifier(modifiers, count, modifier_order, ARRAY_SIZE(modifier_order));
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return i915_bo_create_for_modifier(bo, width, height, format, modifier);
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}
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static void i915_close(struct driver *drv)
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{
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free(drv->priv);
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drv->priv = NULL;
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}
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static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
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{
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int ret;
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struct drm_i915_gem_get_tiling gem_get_tiling;
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ret = drv_prime_bo_import(bo, data);
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if (ret)
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return ret;
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/* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
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memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
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gem_get_tiling.handle = bo->handles[0].u32;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
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if (ret) {
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drv_gem_bo_destroy(bo);
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drv_log("DRM_IOCTL_I915_GEM_GET_TILING failed.\n");
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return ret;
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}
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bo->tiling = gem_get_tiling.tiling_mode;
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return 0;
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}
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static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
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{
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int ret;
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void *addr;
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if (bo->tiling == I915_TILING_NONE) {
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struct drm_i915_gem_mmap gem_map;
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memset(&gem_map, 0, sizeof(gem_map));
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if ((bo->use_flags & BO_USE_SCANOUT) && !(bo->use_flags & BO_USE_RENDERSCRIPT))
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gem_map.flags = I915_MMAP_WC;
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gem_map.handle = bo->handles[0].u32;
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gem_map.offset = 0;
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gem_map.size = bo->total_size;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
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if (ret) {
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drv_log("DRM_IOCTL_I915_GEM_MMAP failed\n");
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return MAP_FAILED;
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}
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addr = (void *)(uintptr_t)gem_map.addr_ptr;
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} else {
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struct drm_i915_gem_mmap_gtt gem_map;
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memset(&gem_map, 0, sizeof(gem_map));
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gem_map.handle = bo->handles[0].u32;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
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if (ret) {
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drv_log("DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
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return MAP_FAILED;
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}
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addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
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gem_map.offset);
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}
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if (addr == MAP_FAILED) {
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drv_log("i915 GEM mmap failed\n");
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return addr;
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}
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vma->length = bo->total_size;
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return addr;
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}
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static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping)
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{
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int ret;
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struct drm_i915_gem_set_domain set_domain;
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memset(&set_domain, 0, sizeof(set_domain));
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set_domain.handle = bo->handles[0].u32;
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if (bo->tiling == I915_TILING_NONE) {
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set_domain.read_domains = I915_GEM_DOMAIN_CPU;
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if (mapping->vma->map_flags & BO_MAP_WRITE)
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set_domain.write_domain = I915_GEM_DOMAIN_CPU;
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} else {
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set_domain.read_domains = I915_GEM_DOMAIN_GTT;
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if (mapping->vma->map_flags & BO_MAP_WRITE)
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set_domain.write_domain = I915_GEM_DOMAIN_GTT;
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}
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
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if (ret) {
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drv_log("DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int i915_bo_flush(struct bo *bo, struct mapping *mapping)
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{
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struct i915_device *i915 = bo->drv->priv;
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if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
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i915_clflush(mapping->vma->addr, mapping->vma->length);
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return 0;
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}
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static uint32_t i915_resolve_format(uint32_t format, uint64_t use_flags)
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{
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switch (format) {
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case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
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/* KBL camera subsystem requires NV12. */
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if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
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return DRM_FORMAT_NV12;
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/*HACK: See b/28671744 */
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return DRM_FORMAT_XBGR8888;
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case DRM_FORMAT_FLEX_YCbCr_420_888:
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/*
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* KBL camera subsystem requires NV12. Our other use cases
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* don't care:
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* - Hardware video supports NV12,
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* - USB Camera HALv3 supports NV12,
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* - USB Camera HALv1 doesn't use this format.
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* Moreover, NV12 is preferred for video, due to overlay
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* support on SKL+.
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*/
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return DRM_FORMAT_NV12;
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default:
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return format;
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}
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}
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const struct backend backend_i915 = {
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.name = "i915",
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.init = i915_init,
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.close = i915_close,
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.bo_create = i915_bo_create,
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.bo_create_with_modifiers = i915_bo_create_with_modifiers,
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.bo_destroy = drv_gem_bo_destroy,
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.bo_import = i915_bo_import,
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.bo_map = i915_bo_map,
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.bo_unmap = drv_bo_munmap,
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.bo_invalidate = i915_bo_invalidate,
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.bo_flush = i915_bo_flush,
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.resolve_format = i915_resolve_format,
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};
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#endif
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