/*
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* Meson8b clock tree IDs
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*/
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#ifndef __MESON8B_CLKC_H
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#define __MESON8B_CLKC_H
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#define CLKID_UNUSED 0
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#define CLKID_XTAL 1
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#define CLKID_PLL_FIXED 2
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#define CLKID_PLL_VID 3
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#define CLKID_PLL_SYS 4
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#define CLKID_FCLK_DIV2 5
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#define CLKID_FCLK_DIV3 6
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#define CLKID_FCLK_DIV4 7
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#define CLKID_FCLK_DIV5 8
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#define CLKID_FCLK_DIV7 9
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#define CLKID_CLK81 10
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#define CLKID_MALI 11
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#define CLKID_CPUCLK 12
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#define CLKID_ZERO 13
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#define CLKID_MPEG_SEL 14
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#define CLKID_MPEG_DIV 15
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#endif /* __MESON8B_CLKC_H */
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