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// Copyright (c) 1994-2006 Sun Microsystems Inc.
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// All Rights Reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// - Redistribution in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// - Neither the name of Sun Microsystems or the names of contributors may
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// be used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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// THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// The original source code covered by the above license above has been
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// modified significantly by Google Inc.
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// Copyright 2012 the V8 project authors. All rights reserved.
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#ifndef V8_MIPS64_ASSEMBLER_MIPS64_INL_H_
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#define V8_MIPS64_ASSEMBLER_MIPS64_INL_H_
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#include "src/mips64/assembler-mips64.h"
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#include "src/assembler.h"
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#include "src/debug/debug.h"
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#include "src/objects-inl.h"
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namespace v8 {
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namespace internal {
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bool CpuFeatures::SupportsOptimizer() { return IsSupported(FPU); }
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bool CpuFeatures::SupportsWasmSimd128() { return IsSupported(MIPS_SIMD); }
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// -----------------------------------------------------------------------------
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// Operand and MemOperand.
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bool Operand::is_reg() const {
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return rm_.is_valid();
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}
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int64_t Operand::immediate() const {
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DCHECK(!is_reg());
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DCHECK(!IsHeapObjectRequest());
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return value_.immediate;
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}
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// -----------------------------------------------------------------------------
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// RelocInfo.
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void RelocInfo::apply(intptr_t delta) {
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if (IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)) {
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// Absolute code pointer inside code object moves with the code object.
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Assembler::RelocateInternalReference(rmode_, pc_, delta);
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}
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}
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Address RelocInfo::target_address() {
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DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) || IsWasmCall(rmode_));
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return Assembler::target_address_at(pc_, constant_pool_);
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}
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Address RelocInfo::target_address_address() {
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DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) || IsWasmCall(rmode_) ||
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IsEmbeddedObject(rmode_) || IsExternalReference(rmode_) ||
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IsOffHeapTarget(rmode_));
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// Read the address of the word containing the target_address in an
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// instruction stream.
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// The only architecture-independent user of this function is the serializer.
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// The serializer uses it to find out how many raw bytes of instruction to
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// output before the next target.
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// For an instruction like LUI/ORI where the target bits are mixed into the
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// instruction bits, the size of the target will be zero, indicating that the
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// serializer should not step forward in memory after a target is resolved
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// and written. In this case the target_address_address function should
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// return the end of the instructions to be patched, allowing the
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// deserializer to deserialize the instructions as raw bytes and put them in
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// place, ready to be patched with the target. After jump optimization,
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// that is the address of the instruction that follows J/JAL/JR/JALR
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// instruction.
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return pc_ + Assembler::kInstructionsFor64BitConstant * kInstrSize;
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}
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Address RelocInfo::constant_pool_entry_address() {
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UNREACHABLE();
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}
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int RelocInfo::target_address_size() {
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return Assembler::kSpecialTargetSize;
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}
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Address Assembler::target_address_from_return_address(Address pc) {
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return pc - kCallTargetAddressOffset;
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}
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void Assembler::deserialization_set_special_target_at(
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Address instruction_payload, Code* code, Address target) {
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set_target_address_at(
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instruction_payload - kInstructionsFor64BitConstant * kInstrSize,
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code ? code->constant_pool() : kNullAddress, target);
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}
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int Assembler::deserialization_special_target_size(
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Address instruction_payload) {
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return kSpecialTargetSize;
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}
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void Assembler::set_target_internal_reference_encoded_at(Address pc,
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Address target) {
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// Encoded internal references are j/jal instructions.
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Instr instr = Assembler::instr_at(pc + 0 * kInstrSize);
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uint64_t imm28 = target & static_cast<uint64_t>(kImm28Mask);
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instr &= ~kImm26Mask;
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uint64_t imm26 = imm28 >> 2;
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DCHECK(is_uint26(imm26));
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instr_at_put(pc, instr | (imm26 & kImm26Mask));
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// Currently used only by deserializer, and all code will be flushed
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// after complete deserialization, no need to flush on each reference.
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}
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void Assembler::deserialization_set_target_internal_reference_at(
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Address pc, Address target, RelocInfo::Mode mode) {
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if (mode == RelocInfo::INTERNAL_REFERENCE_ENCODED) {
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DCHECK(IsJ(instr_at(pc)));
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set_target_internal_reference_encoded_at(pc, target);
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} else {
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DCHECK(mode == RelocInfo::INTERNAL_REFERENCE);
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Memory<Address>(pc) = target;
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}
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}
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HeapObject* RelocInfo::target_object() {
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DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
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return HeapObject::cast(reinterpret_cast<Object*>(
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Assembler::target_address_at(pc_, constant_pool_)));
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}
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Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) {
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DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
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return Handle<HeapObject>(reinterpret_cast<HeapObject**>(
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Assembler::target_address_at(pc_, constant_pool_)));
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}
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void RelocInfo::set_target_object(Heap* heap, HeapObject* target,
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WriteBarrierMode write_barrier_mode,
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ICacheFlushMode icache_flush_mode) {
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DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
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Assembler::set_target_address_at(pc_, constant_pool_,
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reinterpret_cast<Address>(target),
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icache_flush_mode);
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if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != nullptr) {
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WriteBarrierForCode(host(), this, target);
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}
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}
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Address RelocInfo::target_external_reference() {
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DCHECK(rmode_ == EXTERNAL_REFERENCE);
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return Assembler::target_address_at(pc_, constant_pool_);
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}
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void RelocInfo::set_target_external_reference(
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Address target, ICacheFlushMode icache_flush_mode) {
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DCHECK(rmode_ == RelocInfo::EXTERNAL_REFERENCE);
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Assembler::set_target_address_at(pc_, constant_pool_, target,
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icache_flush_mode);
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}
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Address RelocInfo::target_internal_reference() {
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if (rmode_ == INTERNAL_REFERENCE) {
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return Memory<Address>(pc_);
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} else {
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// Encoded internal references are j/jal instructions.
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DCHECK(rmode_ == INTERNAL_REFERENCE_ENCODED);
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Instr instr = Assembler::instr_at(pc_ + 0 * kInstrSize);
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instr &= kImm26Mask;
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uint64_t imm28 = instr << 2;
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uint64_t segment = pc_ & ~static_cast<uint64_t>(kImm28Mask);
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return static_cast<Address>(segment | imm28);
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}
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}
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Address RelocInfo::target_internal_reference_address() {
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DCHECK(rmode_ == INTERNAL_REFERENCE || rmode_ == INTERNAL_REFERENCE_ENCODED);
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return pc_;
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}
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Address RelocInfo::target_runtime_entry(Assembler* origin) {
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DCHECK(IsRuntimeEntry(rmode_));
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return target_address();
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}
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void RelocInfo::set_target_runtime_entry(Address target,
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WriteBarrierMode write_barrier_mode,
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ICacheFlushMode icache_flush_mode) {
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DCHECK(IsRuntimeEntry(rmode_));
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if (target_address() != target)
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set_target_address(target, write_barrier_mode, icache_flush_mode);
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}
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Address RelocInfo::target_off_heap_target() {
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DCHECK(IsOffHeapTarget(rmode_));
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return Assembler::target_address_at(pc_, constant_pool_);
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}
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void RelocInfo::WipeOut() {
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DCHECK(IsEmbeddedObject(rmode_) || IsCodeTarget(rmode_) ||
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IsRuntimeEntry(rmode_) || IsExternalReference(rmode_) ||
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IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_) ||
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IsOffHeapTarget(rmode_));
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if (IsInternalReference(rmode_)) {
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Memory<Address>(pc_) = kNullAddress;
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} else if (IsInternalReferenceEncoded(rmode_)) {
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Assembler::set_target_internal_reference_encoded_at(pc_, kNullAddress);
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} else {
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Assembler::set_target_address_at(pc_, constant_pool_, kNullAddress);
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}
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}
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template <typename ObjectVisitor>
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void RelocInfo::Visit(ObjectVisitor* visitor) {
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RelocInfo::Mode mode = rmode();
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if (mode == RelocInfo::EMBEDDED_OBJECT) {
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visitor->VisitEmbeddedPointer(host(), this);
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} else if (RelocInfo::IsCodeTargetMode(mode)) {
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visitor->VisitCodeTarget(host(), this);
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} else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
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visitor->VisitExternalReference(host(), this);
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} else if (mode == RelocInfo::INTERNAL_REFERENCE ||
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mode == RelocInfo::INTERNAL_REFERENCE_ENCODED) {
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visitor->VisitInternalReference(host(), this);
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} else if (RelocInfo::IsRuntimeEntry(mode)) {
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visitor->VisitRuntimeEntry(host(), this);
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} else if (RelocInfo::IsOffHeapTarget(mode)) {
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visitor->VisitOffHeapTarget(host(), this);
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}
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}
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// -----------------------------------------------------------------------------
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// Assembler.
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void Assembler::CheckBuffer() {
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if (buffer_space() <= kGap) {
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GrowBuffer();
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}
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}
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void Assembler::CheckForEmitInForbiddenSlot() {
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if (!is_buffer_growth_blocked()) {
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CheckBuffer();
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}
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if (IsPrevInstrCompactBranch()) {
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// Nop instruction to precede a CTI in forbidden slot:
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Instr nop = SPECIAL | SLL;
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*reinterpret_cast<Instr*>(pc_) = nop;
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pc_ += kInstrSize;
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ClearCompactBranchState();
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}
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}
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void Assembler::EmitHelper(Instr x, CompactBranchType is_compact_branch) {
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if (IsPrevInstrCompactBranch()) {
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if (Instruction::IsForbiddenAfterBranchInstr(x)) {
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// Nop instruction to precede a CTI in forbidden slot:
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Instr nop = SPECIAL | SLL;
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*reinterpret_cast<Instr*>(pc_) = nop;
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pc_ += kInstrSize;
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}
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ClearCompactBranchState();
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}
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*reinterpret_cast<Instr*>(pc_) = x;
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pc_ += kInstrSize;
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if (is_compact_branch == CompactBranchType::COMPACT_BRANCH) {
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EmittedCompactBranchInstruction();
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}
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CheckTrampolinePoolQuick();
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}
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template <>
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inline void Assembler::EmitHelper(uint8_t x);
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template <typename T>
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void Assembler::EmitHelper(T x) {
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*reinterpret_cast<T*>(pc_) = x;
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pc_ += sizeof(x);
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CheckTrampolinePoolQuick();
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}
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template <>
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void Assembler::EmitHelper(uint8_t x) {
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*reinterpret_cast<uint8_t*>(pc_) = x;
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pc_ += sizeof(x);
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if (reinterpret_cast<intptr_t>(pc_) % kInstrSize == 0) {
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CheckTrampolinePoolQuick();
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}
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}
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void Assembler::emit(Instr x, CompactBranchType is_compact_branch) {
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if (!is_buffer_growth_blocked()) {
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CheckBuffer();
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}
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EmitHelper(x, is_compact_branch);
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}
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void Assembler::emit(uint64_t data) {
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CheckForEmitInForbiddenSlot();
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EmitHelper(data);
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}
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EnsureSpace::EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); }
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} // namespace internal
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} // namespace v8
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#endif // V8_MIPS64_ASSEMBLER_MIPS64_INL_H_
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