// Copyright 2014 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#ifndef V8_COMPILER_INSTRUCTION_SELECTOR_H_
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#define V8_COMPILER_INSTRUCTION_SELECTOR_H_
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#include <map>
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#include "src/compiler/common-operator.h"
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#include "src/compiler/instruction-scheduler.h"
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#include "src/compiler/instruction.h"
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#include "src/compiler/linkage.h"
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#include "src/compiler/machine-operator.h"
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#include "src/compiler/node.h"
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#include "src/globals.h"
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#include "src/zone/zone-containers.h"
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namespace v8 {
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namespace internal {
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namespace compiler {
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// Forward declarations.
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class BasicBlock;
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struct CallBuffer; // TODO(bmeurer): Remove this.
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class Linkage;
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class OperandGenerator;
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class SwitchInfo;
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class StateObjectDeduplicator;
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// The flags continuation is a way to combine a branch or a materialization
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// of a boolean value with an instruction that sets the flags register.
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// The whole instruction is treated as a unit by the register allocator, and
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// thus no spills or moves can be introduced between the flags-setting
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// instruction and the branch or set it should be combined with.
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class FlagsContinuation final {
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public:
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FlagsContinuation() : mode_(kFlags_none) {}
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// Creates a new flags continuation from the given condition and true/false
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// blocks.
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static FlagsContinuation ForBranch(FlagsCondition condition,
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BasicBlock* true_block,
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BasicBlock* false_block) {
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return FlagsContinuation(kFlags_branch, condition, true_block, false_block);
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}
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static FlagsContinuation ForBranchAndPoison(FlagsCondition condition,
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BasicBlock* true_block,
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BasicBlock* false_block) {
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return FlagsContinuation(kFlags_branch_and_poison, condition, true_block,
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false_block);
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}
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// Creates a new flags continuation for an eager deoptimization exit.
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static FlagsContinuation ForDeoptimize(FlagsCondition condition,
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DeoptimizeKind kind,
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DeoptimizeReason reason,
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VectorSlotPair const& feedback,
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Node* frame_state) {
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return FlagsContinuation(kFlags_deoptimize, condition, kind, reason,
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feedback, frame_state);
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}
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// Creates a new flags continuation for an eager deoptimization exit.
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static FlagsContinuation ForDeoptimizeAndPoison(
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FlagsCondition condition, DeoptimizeKind kind, DeoptimizeReason reason,
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VectorSlotPair const& feedback, Node* frame_state) {
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return FlagsContinuation(kFlags_deoptimize_and_poison, condition, kind,
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reason, feedback, frame_state);
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}
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// Creates a new flags continuation for a boolean value.
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static FlagsContinuation ForSet(FlagsCondition condition, Node* result) {
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return FlagsContinuation(condition, result);
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}
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// Creates a new flags continuation for a wasm trap.
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static FlagsContinuation ForTrap(FlagsCondition condition, TrapId trap_id,
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Node* result) {
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return FlagsContinuation(condition, trap_id, result);
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}
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bool IsNone() const { return mode_ == kFlags_none; }
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bool IsBranch() const {
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return mode_ == kFlags_branch || mode_ == kFlags_branch_and_poison;
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}
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bool IsDeoptimize() const {
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return mode_ == kFlags_deoptimize || mode_ == kFlags_deoptimize_and_poison;
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}
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bool IsPoisoned() const {
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return mode_ == kFlags_branch_and_poison ||
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mode_ == kFlags_deoptimize_and_poison;
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}
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bool IsSet() const { return mode_ == kFlags_set; }
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bool IsTrap() const { return mode_ == kFlags_trap; }
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FlagsCondition condition() const {
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DCHECK(!IsNone());
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return condition_;
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}
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DeoptimizeKind kind() const {
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DCHECK(IsDeoptimize());
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return kind_;
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}
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DeoptimizeReason reason() const {
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DCHECK(IsDeoptimize());
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return reason_;
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}
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VectorSlotPair const& feedback() const {
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DCHECK(IsDeoptimize());
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return feedback_;
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}
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Node* frame_state() const {
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DCHECK(IsDeoptimize());
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return frame_state_or_result_;
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}
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Node* result() const {
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DCHECK(IsSet());
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return frame_state_or_result_;
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}
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TrapId trap_id() const {
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DCHECK(IsTrap());
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return trap_id_;
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}
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BasicBlock* true_block() const {
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DCHECK(IsBranch());
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return true_block_;
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}
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BasicBlock* false_block() const {
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DCHECK(IsBranch());
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return false_block_;
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}
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void Negate() {
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DCHECK(!IsNone());
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condition_ = NegateFlagsCondition(condition_);
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}
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void Commute() {
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DCHECK(!IsNone());
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condition_ = CommuteFlagsCondition(condition_);
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}
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void Overwrite(FlagsCondition condition) { condition_ = condition; }
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void OverwriteAndNegateIfEqual(FlagsCondition condition) {
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DCHECK(condition_ == kEqual || condition_ == kNotEqual);
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bool negate = condition_ == kEqual;
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condition_ = condition;
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if (negate) Negate();
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}
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void OverwriteUnsignedIfSigned() {
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switch (condition_) {
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case kSignedLessThan:
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condition_ = kUnsignedLessThan;
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break;
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case kSignedLessThanOrEqual:
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condition_ = kUnsignedLessThanOrEqual;
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break;
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case kSignedGreaterThan:
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condition_ = kUnsignedGreaterThan;
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break;
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case kSignedGreaterThanOrEqual:
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condition_ = kUnsignedGreaterThanOrEqual;
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break;
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default:
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break;
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}
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}
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// Encodes this flags continuation into the given opcode.
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InstructionCode Encode(InstructionCode opcode) {
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opcode |= FlagsModeField::encode(mode_);
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if (mode_ != kFlags_none) {
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opcode |= FlagsConditionField::encode(condition_);
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}
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return opcode;
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}
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private:
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FlagsContinuation(FlagsMode mode, FlagsCondition condition,
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BasicBlock* true_block, BasicBlock* false_block)
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: mode_(mode),
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condition_(condition),
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true_block_(true_block),
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false_block_(false_block) {
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DCHECK(mode == kFlags_branch || mode == kFlags_branch_and_poison);
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DCHECK_NOT_NULL(true_block);
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DCHECK_NOT_NULL(false_block);
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}
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FlagsContinuation(FlagsMode mode, FlagsCondition condition,
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DeoptimizeKind kind, DeoptimizeReason reason,
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VectorSlotPair const& feedback, Node* frame_state)
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: mode_(mode),
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condition_(condition),
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kind_(kind),
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reason_(reason),
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feedback_(feedback),
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frame_state_or_result_(frame_state) {
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DCHECK(mode == kFlags_deoptimize || mode == kFlags_deoptimize_and_poison);
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DCHECK_NOT_NULL(frame_state);
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}
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FlagsContinuation(FlagsCondition condition, Node* result)
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: mode_(kFlags_set),
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condition_(condition),
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frame_state_or_result_(result) {
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DCHECK_NOT_NULL(result);
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}
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FlagsContinuation(FlagsCondition condition, TrapId trap_id, Node* result)
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: mode_(kFlags_trap),
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condition_(condition),
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frame_state_or_result_(result),
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trap_id_(trap_id) {
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DCHECK_NOT_NULL(result);
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}
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FlagsMode const mode_;
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FlagsCondition condition_;
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DeoptimizeKind kind_; // Only valid if mode_ == kFlags_deoptimize*
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DeoptimizeReason reason_; // Only valid if mode_ == kFlags_deoptimize*
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VectorSlotPair feedback_; // Only valid if mode_ == kFlags_deoptimize*
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Node* frame_state_or_result_; // Only valid if mode_ == kFlags_deoptimize*
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// or mode_ == kFlags_set.
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BasicBlock* true_block_; // Only valid if mode_ == kFlags_branch*.
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BasicBlock* false_block_; // Only valid if mode_ == kFlags_branch*.
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TrapId trap_id_; // Only valid if mode_ == kFlags_trap.
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};
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// This struct connects nodes of parameters which are going to be pushed on the
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// call stack with their parameter index in the call descriptor of the callee.
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struct PushParameter {
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PushParameter(Node* n = nullptr,
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LinkageLocation l = LinkageLocation::ForAnyRegister())
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: node(n), location(l) {}
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Node* node;
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LinkageLocation location;
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};
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enum class FrameStateInputKind { kAny, kStackSlot };
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// Instruction selection generates an InstructionSequence for a given Schedule.
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class V8_EXPORT_PRIVATE InstructionSelector final {
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public:
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// Forward declarations.
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class Features;
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enum SourcePositionMode { kCallSourcePositions, kAllSourcePositions };
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enum EnableScheduling { kDisableScheduling, kEnableScheduling };
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enum EnableRootsRelativeAddressing {
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kDisableRootsRelativeAddressing,
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kEnableRootsRelativeAddressing
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};
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enum EnableSwitchJumpTable {
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kDisableSwitchJumpTable,
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kEnableSwitchJumpTable
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};
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enum EnableTraceTurboJson { kDisableTraceTurboJson, kEnableTraceTurboJson };
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InstructionSelector(
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Zone* zone, size_t node_count, Linkage* linkage,
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InstructionSequence* sequence, Schedule* schedule,
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SourcePositionTable* source_positions, Frame* frame,
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EnableSwitchJumpTable enable_switch_jump_table,
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SourcePositionMode source_position_mode = kCallSourcePositions,
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Features features = SupportedFeatures(),
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EnableScheduling enable_scheduling = FLAG_turbo_instruction_scheduling
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? kEnableScheduling
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: kDisableScheduling,
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EnableRootsRelativeAddressing enable_roots_relative_addressing =
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kDisableRootsRelativeAddressing,
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PoisoningMitigationLevel poisoning_level =
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PoisoningMitigationLevel::kDontPoison,
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EnableTraceTurboJson trace_turbo = kDisableTraceTurboJson);
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// Visit code for the entire graph with the included schedule.
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bool SelectInstructions();
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void StartBlock(RpoNumber rpo);
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void EndBlock(RpoNumber rpo);
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void AddInstruction(Instruction* instr);
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void AddTerminator(Instruction* instr);
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// ===========================================================================
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// ============= Architecture-independent code emission methods. =============
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// ===========================================================================
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Instruction* Emit(InstructionCode opcode, InstructionOperand output,
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size_t temp_count = 0, InstructionOperand* temps = nullptr);
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Instruction* Emit(InstructionCode opcode, InstructionOperand output,
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InstructionOperand a, size_t temp_count = 0,
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InstructionOperand* temps = nullptr);
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Instruction* Emit(InstructionCode opcode, InstructionOperand output,
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InstructionOperand a, InstructionOperand b,
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size_t temp_count = 0, InstructionOperand* temps = nullptr);
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Instruction* Emit(InstructionCode opcode, InstructionOperand output,
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InstructionOperand a, InstructionOperand b,
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InstructionOperand c, size_t temp_count = 0,
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InstructionOperand* temps = nullptr);
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Instruction* Emit(InstructionCode opcode, InstructionOperand output,
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InstructionOperand a, InstructionOperand b,
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InstructionOperand c, InstructionOperand d,
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size_t temp_count = 0, InstructionOperand* temps = nullptr);
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Instruction* Emit(InstructionCode opcode, InstructionOperand output,
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InstructionOperand a, InstructionOperand b,
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InstructionOperand c, InstructionOperand d,
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InstructionOperand e, size_t temp_count = 0,
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InstructionOperand* temps = nullptr);
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Instruction* Emit(InstructionCode opcode, InstructionOperand output,
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InstructionOperand a, InstructionOperand b,
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InstructionOperand c, InstructionOperand d,
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InstructionOperand e, InstructionOperand f,
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size_t temp_count = 0, InstructionOperand* temps = nullptr);
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Instruction* Emit(InstructionCode opcode, size_t output_count,
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InstructionOperand* outputs, size_t input_count,
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InstructionOperand* inputs, size_t temp_count = 0,
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InstructionOperand* temps = nullptr);
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Instruction* Emit(Instruction* instr);
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// [0-3] operand instructions with no output, uses labels for true and false
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// blocks of the continuation.
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Instruction* EmitWithContinuation(InstructionCode opcode,
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FlagsContinuation* cont);
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Instruction* EmitWithContinuation(InstructionCode opcode,
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InstructionOperand a,
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FlagsContinuation* cont);
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Instruction* EmitWithContinuation(InstructionCode opcode,
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InstructionOperand a, InstructionOperand b,
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FlagsContinuation* cont);
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Instruction* EmitWithContinuation(InstructionCode opcode,
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InstructionOperand a, InstructionOperand b,
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InstructionOperand c,
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FlagsContinuation* cont);
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Instruction* EmitWithContinuation(InstructionCode opcode, size_t output_count,
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InstructionOperand* outputs,
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size_t input_count,
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InstructionOperand* inputs,
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FlagsContinuation* cont);
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// ===========================================================================
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// ===== Architecture-independent deoptimization exit emission methods. ======
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// ===========================================================================
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Instruction* EmitDeoptimize(InstructionCode opcode, size_t output_count,
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InstructionOperand* outputs, size_t input_count,
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InstructionOperand* inputs, DeoptimizeKind kind,
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DeoptimizeReason reason,
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VectorSlotPair const& feedback,
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Node* frame_state);
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// ===========================================================================
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// ============== Architecture-independent CPU feature methods. ==============
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// ===========================================================================
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class Features final {
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public:
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Features() : bits_(0) {}
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explicit Features(unsigned bits) : bits_(bits) {}
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explicit Features(CpuFeature f) : bits_(1u << f) {}
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Features(CpuFeature f1, CpuFeature f2) : bits_((1u << f1) | (1u << f2)) {}
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bool Contains(CpuFeature f) const { return (bits_ & (1u << f)); }
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private:
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unsigned bits_;
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};
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bool IsSupported(CpuFeature feature) const {
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return features_.Contains(feature);
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}
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// Returns the features supported on the target platform.
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static Features SupportedFeatures() {
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return Features(CpuFeatures::SupportedFeatures());
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}
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// TODO(sigurds) This should take a CpuFeatures argument.
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static MachineOperatorBuilder::Flags SupportedMachineOperatorFlags();
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static MachineOperatorBuilder::AlignmentRequirements AlignmentRequirements();
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bool NeedsPoisoning(IsSafetyCheck safety_check) const;
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// ===========================================================================
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// ============ Architecture-independent graph covering methods. =============
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// ===========================================================================
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// Used in pattern matching during code generation.
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// Check if {node} can be covered while generating code for the current
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// instruction. A node can be covered if the {user} of the node has the only
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// edge and the two are in the same basic block.
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bool CanCover(Node* user, Node* node) const;
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// Used in pattern matching during code generation.
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// This function checks that {node} and {user} are in the same basic block,
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// and that {user} is the only user of {node} in this basic block. This
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// check guarantees that there are no users of {node} scheduled between
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// {node} and {user}, and thus we can select a single instruction for both
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// nodes, if such an instruction exists. This check can be used for example
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// when selecting instructions for:
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// n = Int32Add(a, b)
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// c = Word32Compare(n, 0, cond)
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// Branch(c, true_label, false_label)
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// Here we can generate a flag-setting add instruction, even if the add has
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// uses in other basic blocks, since the flag-setting add instruction will
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// still generate the result of the addition and not just set the flags.
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// However, if we had uses of the add in the same basic block, we could have:
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// n = Int32Add(a, b)
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// o = OtherOp(n, ...)
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// c = Word32Compare(n, 0, cond)
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// Branch(c, true_label, false_label)
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// where we cannot select the add and the compare together. If we were to
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// select a flag-setting add instruction for Word32Compare and Int32Add while
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// visiting Word32Compare, we would then have to select an instruction for
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// OtherOp *afterwards*, which means we would attempt to use the result of
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// the add before we have defined it.
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bool IsOnlyUserOfNodeInSameBlock(Node* user, Node* node) const;
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// Checks if {node} was already defined, and therefore code was already
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// generated for it.
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bool IsDefined(Node* node) const;
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// Checks if {node} has any uses, and therefore code has to be generated for
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// it.
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bool IsUsed(Node* node) const;
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// Checks if {node} is currently live.
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bool IsLive(Node* node) const { return !IsDefined(node) && IsUsed(node); }
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// Gets the effect level of {node}.
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int GetEffectLevel(Node* node) const;
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int GetVirtualRegister(const Node* node);
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const std::map<NodeId, int> GetVirtualRegistersForTesting() const;
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// Check if we can generate loads and stores of ExternalConstants relative
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// to the roots register.
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bool CanAddressRelativeToRootsRegister() const;
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// Check if we can use the roots register to access GC roots.
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bool CanUseRootsRegister() const;
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Isolate* isolate() const { return sequence()->isolate(); }
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const ZoneVector<std::pair<int, int>>& instr_origins() const {
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return instr_origins_;
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}
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// Expose these SIMD helper functions for testing.
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static void CanonicalizeShuffleForTesting(bool inputs_equal, uint8_t* shuffle,
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bool* needs_swap,
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bool* is_swizzle) {
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CanonicalizeShuffle(inputs_equal, shuffle, needs_swap, is_swizzle);
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}
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static bool TryMatchIdentityForTesting(const uint8_t* shuffle) {
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return TryMatchIdentity(shuffle);
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}
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template <int LANES>
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static bool TryMatchDupForTesting(const uint8_t* shuffle, int* index) {
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return TryMatchDup<LANES>(shuffle, index);
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}
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static bool TryMatch32x4ShuffleForTesting(const uint8_t* shuffle,
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uint8_t* shuffle32x4) {
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return TryMatch32x4Shuffle(shuffle, shuffle32x4);
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}
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static bool TryMatch16x8ShuffleForTesting(const uint8_t* shuffle,
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uint8_t* shuffle16x8) {
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return TryMatch16x8Shuffle(shuffle, shuffle16x8);
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}
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static bool TryMatchConcatForTesting(const uint8_t* shuffle,
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uint8_t* offset) {
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return TryMatchConcat(shuffle, offset);
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}
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static bool TryMatchBlendForTesting(const uint8_t* shuffle) {
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return TryMatchBlend(shuffle);
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}
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private:
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friend class OperandGenerator;
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bool UseInstructionScheduling() const {
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return (enable_scheduling_ == kEnableScheduling) &&
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InstructionScheduler::SchedulerSupported();
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}
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void AppendDeoptimizeArguments(InstructionOperandVector* args,
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DeoptimizeKind kind, DeoptimizeReason reason,
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VectorSlotPair const& feedback,
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Node* frame_state);
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void EmitTableSwitch(const SwitchInfo& sw, InstructionOperand& index_operand);
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void EmitLookupSwitch(const SwitchInfo& sw,
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InstructionOperand& value_operand);
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void EmitBinarySearchSwitch(const SwitchInfo& sw,
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InstructionOperand& value_operand);
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void TryRename(InstructionOperand* op);
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int GetRename(int virtual_register);
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void SetRename(const Node* node, const Node* rename);
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void UpdateRenames(Instruction* instruction);
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void UpdateRenamesInPhi(PhiInstruction* phi);
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// Inform the instruction selection that {node} was just defined.
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void MarkAsDefined(Node* node);
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// Inform the instruction selection that {node} has at least one use and we
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// will need to generate code for it.
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void MarkAsUsed(Node* node);
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// Sets the effect level of {node}.
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void SetEffectLevel(Node* node, int effect_level);
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// Inform the register allocation of the representation of the value produced
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// by {node}.
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void MarkAsRepresentation(MachineRepresentation rep, Node* node);
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void MarkAsWord32(Node* node) {
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MarkAsRepresentation(MachineRepresentation::kWord32, node);
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}
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void MarkAsWord64(Node* node) {
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MarkAsRepresentation(MachineRepresentation::kWord64, node);
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}
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void MarkAsFloat32(Node* node) {
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MarkAsRepresentation(MachineRepresentation::kFloat32, node);
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}
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void MarkAsFloat64(Node* node) {
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MarkAsRepresentation(MachineRepresentation::kFloat64, node);
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}
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void MarkAsSimd128(Node* node) {
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MarkAsRepresentation(MachineRepresentation::kSimd128, node);
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}
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void MarkAsReference(Node* node) {
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MarkAsRepresentation(MachineRepresentation::kTagged, node);
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}
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// Inform the register allocation of the representation of the unallocated
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// operand {op}.
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void MarkAsRepresentation(MachineRepresentation rep,
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const InstructionOperand& op);
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enum CallBufferFlag {
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kCallCodeImmediate = 1u << 0,
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kCallAddressImmediate = 1u << 1,
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kCallTail = 1u << 2,
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kCallFixedTargetRegister = 1u << 3,
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};
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typedef base::Flags<CallBufferFlag> CallBufferFlags;
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// Initialize the call buffer with the InstructionOperands, nodes, etc,
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// corresponding
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// to the inputs and outputs of the call.
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// {call_code_immediate} to generate immediate operands to calls of code.
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// {call_address_immediate} to generate immediate operands to address calls.
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void InitializeCallBuffer(Node* call, CallBuffer* buffer,
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CallBufferFlags flags, bool is_tail_call,
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int stack_slot_delta = 0);
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bool IsTailCallAddressImmediate();
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int GetTempsCountForTailCallFromJSFunction();
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FrameStateDescriptor* GetFrameStateDescriptor(Node* node);
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size_t AddInputsToFrameStateDescriptor(FrameStateDescriptor* descriptor,
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Node* state, OperandGenerator* g,
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StateObjectDeduplicator* deduplicator,
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InstructionOperandVector* inputs,
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FrameStateInputKind kind, Zone* zone);
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size_t AddOperandToStateValueDescriptor(StateValueList* values,
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InstructionOperandVector* inputs,
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OperandGenerator* g,
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StateObjectDeduplicator* deduplicator,
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Node* input, MachineType type,
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FrameStateInputKind kind, Zone* zone);
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// ===========================================================================
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// ============= Architecture-specific graph covering methods. ===============
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// ===========================================================================
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// Visit nodes in the given block and generate code.
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void VisitBlock(BasicBlock* block);
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// Visit the node for the control flow at the end of the block, generating
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// code if necessary.
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void VisitControl(BasicBlock* block);
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// Visit the node and generate code, if any.
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void VisitNode(Node* node);
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// Visit the node and generate code for IEEE 754 functions.
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void VisitFloat64Ieee754Binop(Node*, InstructionCode code);
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void VisitFloat64Ieee754Unop(Node*, InstructionCode code);
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#define DECLARE_GENERATOR(x) void Visit##x(Node* node);
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MACHINE_OP_LIST(DECLARE_GENERATOR)
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MACHINE_SIMD_OP_LIST(DECLARE_GENERATOR)
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#undef DECLARE_GENERATOR
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void VisitFinishRegion(Node* node);
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void VisitParameter(Node* node);
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void VisitIfException(Node* node);
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void VisitOsrValue(Node* node);
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void VisitPhi(Node* node);
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void VisitProjection(Node* node);
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void VisitConstant(Node* node);
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void VisitCall(Node* call, BasicBlock* handler = nullptr);
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void VisitCallWithCallerSavedRegisters(Node* call,
|
BasicBlock* handler = nullptr);
|
void VisitDeoptimizeIf(Node* node);
|
void VisitDeoptimizeUnless(Node* node);
|
void VisitTrapIf(Node* node, TrapId trap_id);
|
void VisitTrapUnless(Node* node, TrapId trap_id);
|
void VisitTailCall(Node* call);
|
void VisitGoto(BasicBlock* target);
|
void VisitBranch(Node* input, BasicBlock* tbranch, BasicBlock* fbranch);
|
void VisitSwitch(Node* node, const SwitchInfo& sw);
|
void VisitDeoptimize(DeoptimizeKind kind, DeoptimizeReason reason,
|
VectorSlotPair const& feedback, Node* value);
|
void VisitReturn(Node* ret);
|
void VisitThrow(Node* node);
|
void VisitRetain(Node* node);
|
void VisitUnreachable(Node* node);
|
void VisitDeadValue(Node* node);
|
|
void VisitWordCompareZero(Node* user, Node* value, FlagsContinuation* cont);
|
|
void EmitWordPoisonOnSpeculation(Node* node);
|
|
void EmitPrepareArguments(ZoneVector<compiler::PushParameter>* arguments,
|
const CallDescriptor* call_descriptor, Node* node);
|
void EmitPrepareResults(ZoneVector<compiler::PushParameter>* results,
|
const CallDescriptor* call_descriptor, Node* node);
|
|
void EmitIdentity(Node* node);
|
bool CanProduceSignalingNaN(Node* node);
|
|
// ===========================================================================
|
// ============= Vector instruction (SIMD) helper fns. =======================
|
// ===========================================================================
|
|
// Converts a shuffle into canonical form, meaning that the first lane index
|
// is in the range [0 .. 15]. Set |inputs_equal| true if this is an explicit
|
// swizzle. Returns canonicalized |shuffle|, |needs_swap|, and |is_swizzle|.
|
// If |needs_swap| is true, inputs must be swapped. If |is_swizzle| is true,
|
// the second input can be ignored.
|
static void CanonicalizeShuffle(bool inputs_equal, uint8_t* shuffle,
|
bool* needs_swap, bool* is_swizzle);
|
|
// Canonicalize shuffles to make pattern matching simpler. Returns the shuffle
|
// indices, and a boolean indicating if the shuffle is a swizzle (one input).
|
void CanonicalizeShuffle(Node* node, uint8_t* shuffle, bool* is_swizzle);
|
|
// Swaps the two first input operands of the node, to help match shuffles
|
// to specific architectural instructions.
|
void SwapShuffleInputs(Node* node);
|
|
// Tries to match an 8x16 byte shuffle to the identity shuffle, which is
|
// [0 1 ... 15]. This should be called after canonicalizing the shuffle, so
|
// the second identity shuffle, [16 17 .. 31] is converted to the first one.
|
static bool TryMatchIdentity(const uint8_t* shuffle);
|
|
// Tries to match a byte shuffle to a scalar splat operation. Returns the
|
// index of the lane if successful.
|
template <int LANES>
|
static bool TryMatchDup(const uint8_t* shuffle, int* index) {
|
const int kBytesPerLane = kSimd128Size / LANES;
|
// Get the first lane's worth of bytes and check that indices start at a
|
// lane boundary and are consecutive.
|
uint8_t lane0[kBytesPerLane];
|
lane0[0] = shuffle[0];
|
if (lane0[0] % kBytesPerLane != 0) return false;
|
for (int i = 1; i < kBytesPerLane; ++i) {
|
lane0[i] = shuffle[i];
|
if (lane0[i] != lane0[0] + i) return false;
|
}
|
// Now check that the other lanes are identical to lane0.
|
for (int i = 1; i < LANES; ++i) {
|
for (int j = 0; j < kBytesPerLane; ++j) {
|
if (lane0[j] != shuffle[i * kBytesPerLane + j]) return false;
|
}
|
}
|
*index = lane0[0] / kBytesPerLane;
|
return true;
|
}
|
|
// Tries to match an 8x16 byte shuffle to an equivalent 32x4 shuffle. If
|
// successful, it writes the 32x4 shuffle word indices. E.g.
|
// [0 1 2 3 8 9 10 11 4 5 6 7 12 13 14 15] == [0 2 1 3]
|
static bool TryMatch32x4Shuffle(const uint8_t* shuffle, uint8_t* shuffle32x4);
|
|
// Tries to match an 8x16 byte shuffle to an equivalent 16x8 shuffle. If
|
// successful, it writes the 16x8 shuffle word indices. E.g.
|
// [0 1 8 9 2 3 10 11 4 5 12 13 6 7 14 15] == [0 4 1 5 2 6 3 7]
|
static bool TryMatch16x8Shuffle(const uint8_t* shuffle, uint8_t* shuffle16x8);
|
|
// Tries to match a byte shuffle to a concatenate operation, formed by taking
|
// 16 bytes from the 32 byte concatenation of the inputs. If successful, it
|
// writes the byte offset. E.g. [4 5 6 7 .. 16 17 18 19] concatenates both
|
// source vectors with offset 4. The shuffle should be canonicalized.
|
static bool TryMatchConcat(const uint8_t* shuffle, uint8_t* offset);
|
|
// Tries to match a byte shuffle to a blend operation, which is a shuffle
|
// where no lanes change position. E.g. [0 9 2 11 .. 14 31] interleaves the
|
// even lanes of the first source with the odd lanes of the second. The
|
// shuffle should be canonicalized.
|
static bool TryMatchBlend(const uint8_t* shuffle);
|
|
// Packs 4 bytes of shuffle into a 32 bit immediate.
|
static int32_t Pack4Lanes(const uint8_t* shuffle);
|
|
// ===========================================================================
|
|
Schedule* schedule() const { return schedule_; }
|
Linkage* linkage() const { return linkage_; }
|
InstructionSequence* sequence() const { return sequence_; }
|
Zone* instruction_zone() const { return sequence()->zone(); }
|
Zone* zone() const { return zone_; }
|
|
void set_instruction_selection_failed() {
|
instruction_selection_failed_ = true;
|
}
|
bool instruction_selection_failed() { return instruction_selection_failed_; }
|
|
void MarkPairProjectionsAsWord32(Node* node);
|
bool IsSourcePositionUsed(Node* node);
|
void VisitWord32AtomicBinaryOperation(Node* node, ArchOpcode int8_op,
|
ArchOpcode uint8_op,
|
ArchOpcode int16_op,
|
ArchOpcode uint16_op,
|
ArchOpcode word32_op);
|
void VisitWord64AtomicBinaryOperation(Node* node, ArchOpcode uint8_op,
|
ArchOpcode uint16_op,
|
ArchOpcode uint32_op,
|
ArchOpcode uint64_op);
|
void VisitWord64AtomicNarrowBinop(Node* node, ArchOpcode uint8_op,
|
ArchOpcode uint16_op, ArchOpcode uint32_op);
|
|
// ===========================================================================
|
|
Zone* const zone_;
|
Linkage* const linkage_;
|
InstructionSequence* const sequence_;
|
SourcePositionTable* const source_positions_;
|
SourcePositionMode const source_position_mode_;
|
Features features_;
|
Schedule* const schedule_;
|
BasicBlock* current_block_;
|
ZoneVector<Instruction*> instructions_;
|
InstructionOperandVector continuation_inputs_;
|
InstructionOperandVector continuation_outputs_;
|
BoolVector defined_;
|
BoolVector used_;
|
IntVector effect_level_;
|
IntVector virtual_registers_;
|
IntVector virtual_register_rename_;
|
InstructionScheduler* scheduler_;
|
EnableScheduling enable_scheduling_;
|
EnableRootsRelativeAddressing enable_roots_relative_addressing_;
|
EnableSwitchJumpTable enable_switch_jump_table_;
|
|
PoisoningMitigationLevel poisoning_level_;
|
Frame* frame_;
|
bool instruction_selection_failed_;
|
ZoneVector<std::pair<int, int>> instr_origins_;
|
EnableTraceTurboJson trace_turbo_;
|
};
|
|
} // namespace compiler
|
} // namespace internal
|
} // namespace v8
|
|
#endif // V8_COMPILER_INSTRUCTION_SELECTOR_H_
|
